MNEMOSENE project deliverables
The page lists 11 deliverables related to the research project "MNEMOSENE".
List of Deliverables
| title and desprition | type | last update |
|---|---|---|
Initial models of memristive deviceBased on experimental memristive device characteristics and existing physical device models that are mainly based on continuum models, physical and/or behavioural compact models will be derived for use in circuit simulation. This activity includes model building for both ReRAM devices (RTWH) and PCM devices (IBM), while IMEC will bring in their models as “blackboxesâ€. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
First version backend compiler for micro-instructionsFirst compiler generation of micro instruction for the CIM file. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
Promotional materialMaterial for publicity and promotion including a project leaflet, a poster, a powerpoint presentation and a short film. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Websites, patent fillings, videos etc. | 2020-02-11 |
Project websiteA project website will be designed, including an external facing website and an internal facing secure cloud storage. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Websites, patent fillings, videos etc. | 2020-02-11 |
Initial communication protocols and infrastructureIn this report, we will detail the results that will describe the circuits and methods to allow efficient data transfer between tiles and the outside world. The report will detail the challenges, and list the potential solutions that were considered. The circuits methods described in this report will form the basis of the initial system being developed I the project, which will then be refined throughout the project. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
First version programming interface at the micro- and macro-levelsDescription of micro and macro instruction set. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
Initial memristor crossbar based logic/ arithmetic and memory designs and modelsThe memory compiler models of IMEC will incorporate a few most promising non-volatile memory models, together with behavioural models for sense amplifiers and column/row decoder circuits. These models therefore overcome the limitations of NVSim by generating power/performance/area data which can be applied to a wide range of in-memory computing architecture exploration. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
Initial CIM microarchitectureTo enable the technology-aware microarchitecture simulator framework for detailed in-memory computing trade-off exploration, in WP4 a bridge has to be created between the macro-architecture simulator developed as part of WP 3 and the memory compiler models from D4.4. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
First report on new algorithmic solutionsDevelop new algorithms for the targeted applications while considering the features of the new CIM architecture. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
Report on targeted applications, their specifications, requirementsThe report will describe some highly relevant problems arising in the emerging fields of cognitive computing and internet of things (IoT) that could benefit from implementation on non-von Neumann computing architecture based on the computation-in-memory (CIM) dies. The CIM dies could implement digital memristive logic or perform certain arithmetic operations such as vector-matrix multiplication. The report will also describe the application-specific requirements on the CIM dies. Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |
Initial macro CIM architecture and CIM-ISAInitial ISA description for the whole CIM architecture based on the requirements from D1.1 Programme: H2020-EU.2.1.1. - Topic(s): ICT-31-2017 |
Documents, reports | 2020-02-11 |