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IMMORTAL SIGNED

Integrated Modelling, Fault Management, Verification and Reliable Design Environment for Cyber-Physical Systems

Total Cost €

EC-Contrib. €

Partnership

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Outcomes and
results

IMMORTAL project word cloud

Explore the words cloud of the IMMORTAL project. It provides you a very rough idea of what is the project "IMMORTAL" about.

impacts specified maintenance verification debug introducing architecture networked line manner physical expertise considerations recovery telecommunication framework tools sources security model academic firmware architectures domains environmental automotive fault wear tool cps world cpss extended spanning satellite coming fast cyber fill time cross players applicable holistic life plans frameworks layers reliability automated detection software ultra validation uniform demonstration examples dependable isolation gap avionics circuit immortal layer error network device ageing fundamentally infrastructure core industrial combining bugs board digital computer variations

Project "IMMORTAL" data sheet

The following table provides information about the project.

Coordinator	TALLINNA TEHNIKAULIKOOL Organization address address: Ehitajate tee 5 city: TALLINN postcode: 12616 website: www.ttu.ee contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.
Coordinator Country	Estonia [EE]
Project website	http://h2020-immortal.eu/
Total cost	3˙996˙652 €
EC max contribution	3˙996˙652 € (100%)
Programme	1. H2020-EU.2.1.1.1. (A new generation of components and systems: Engineering of advanced embedded and energy and resource efficient components and systems)
Code Call	H2020-ICT-2014-1
Funding Scheme	RIA
Starting year	2015
Duration (year-month-day)	from 2015-03-01 to 2018-02-28

Partnership

Take a look of project's partnership.

#	participants	country	role	EC contrib. [€]
1	TALLINNA TEHNIKAULIKOOL TALLINNA TEHNIKAULIKOOL Organization address address: Ehitajate tee 5 city: TALLINN postcode: 12616 website: www.ttu.ee contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	EE (TALLINN)	coordinator	377˙750.00
2	IBM ISRAEL - SCIENCE AND TECHNOLOGY LTD IBM ISRAEL - SCIENCE AND TECHNOLOGY LTD Organization address address: 94 DERECH EM-HAMOSHAVOT city: PETACH TIKVA postcode: 49527 website: www.haifa.il.ibm.com contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	IL (PETACH TIKVA)	participant	799˙625.00
3	DEUTSCHES ZENTRUM FUER LUFT - UND RAUMFAHRT EV DEUTSCHES ZENTRUM FUER LUFT - UND RAUMFAHRT EV Organization address address: Linder Hoehe city: KOELN postcode: 51147 website: www.dlr.de contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	DE (KOELN)	participant	777˙270.00
4	TECHNISCHE UNIVERSITAET GRAZ TECHNISCHE UNIVERSITAET GRAZ Organization address address: RECHBAUERSTRASSE 12 city: GRAZ postcode: 8010 website: www.tugraz.at contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	AT (GRAZ)	participant	669˙375.00
5	RECORE SYSTEMS BV RECORE SYSTEMS BV Organization address address: COLOSSEUM 1 city: ENSCHEDE postcode: 7521 PV website: n.a. contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	NL (ENSCHEDE)	participant	576˙875.00
6	UNIVERSITEIT TWENTE UNIVERSITEIT TWENTE Organization address address: DRIENERLOLAAN 5 city: ENSCHEDE postcode: 7522 NB website: www.utwente.nl contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	NL (ENSCHEDE)	participant	490˙245.00
7	OÜ TESTONICA LAB OÜ TESTONICA LAB Organization address address: AKADEEMIA TEE 15A city: Tallinn postcode: 12618 website: n.a. contact info title: n.a. name: n.a. surname: n.a. function: n.a. email: n.a. telephone: n.a. fax: n.a.	EE (Tallinn)	participant	305˙512.00

Map

Project objective

In IMMORTAL, a consortium of leading European academic and industrial players aim at combining their expertise in developing an integrated, cross-layer modelling based tool framework for fault management, verification and reliable design of dependable Cyber-Physical Systems (CPS). Recently, the world has seen emerging CPS modelling frameworks addressing various design aspects such as control, security, verification and validation. However, there have been no considerations for reliability and automated debug aspects of verification. The main aim is to fill this gap by introducing reliable design and automated system debug into CPS modelling. To reach this aim, the project will develop a cross-layer CPS model spanning device (analogue and digital), circuit, network architecture, firmware and software layers. In addition, a holistic fault model for fundamentally different error sources in CPSs (design bugs, wear-out and environmental effects) in a uniform manner will be proposed. Moreover, IMMORTAL plans to develop fault management infrastructure on top of the reliable design framework that would allow ultra-fast fault detection, isolation and recovery in the emerging many-core based CPS networked architectures that are expected to be increasingly adopted in the coming years. As a result, the project will enable development of dependable CPSs with improved reliability and extended effective life-time, ageing and process variations. In line with the expected impacts of the Call, the project will have a significant impact in development time as well as maintenance costs of dependable cyber-physical systems. The tool framework to be developed will be evaluated on a clearly specified real-world use-case of a satellite on-board-computer. However, since the results are more general and applicable to many application domains, including avionics, automotive and telecommunication, demonstration of the framework tools will be applied to CPS examples from other domains as well.

Deliverables

List of deliverables.
Verification, debugging and testing tools	Documents, reports	2019-05-30 17:02:13
CPS run-time for SW task deployment	Documents, reports	2019-05-30 17:02:07
Fault models and reliability metrics	Documents, reports	2019-05-30 17:02:03
Dynamic, semi-formal and formal reliability analysis methods	Documents, reports	2019-05-30 17:02:13
Cross-layer CPS modelling framework	Documents, reports	2019-05-30 17:02:07
Verification, debugging and testing methods	Documents, reports	2019-05-30 17:02:02
Dissemination and communication report	Documents, reports	2019-05-30 17:02:00
System-level reliability analysis tools	Documents, reports	2019-05-30 17:01:58
FDIR schemes (incl. reconfiguration, health map, fault classification)	Documents, reports	2019-05-30 17:01:50
Status on modelling, fault/reconfiguration modelling and reliability metrics	Documents, reports	2019-05-30 17:02:15
Status on fault management	Documents, reports	2019-05-30 17:02:00
Reconfiguration modelling	Documents, reports	2019-05-30 17:02:10
Online fault detection mechanisms	Documents, reports	2019-05-30 17:02:00
Silicon demonstrator for fault management and mixed-signal reliability verification	Demonstrators, pilots, prototypes	2019-05-30 17:01:59
Market analysis	Documents, reports	2019-05-30 17:01:59
Integrated demonstrator on modelling, verification and reliability analysis	Documents, reports	2019-05-30 17:01:58
Integrated FPGA demonstrator of the fault management framework	Demonstrators, pilots, prototypes	2019-05-30 17:02:07
Fault management infrastructure verification tools	Documents, reports	2019-05-30 17:02:01
IMMORTAL Website and factsheet	Websites, patent fillings, videos etc.	2019-05-30 17:02:05
Dynamic, semi-formal and formal reliability analysis tools	Documents, reports	2019-05-30 17:01:49

Take a look to the deliverables list in detail: detailed list of IMMORTAL deliverables.

Publications

List of publications.
year	authors and title	journal	last update
2018	H. Ebrahimi and H.G. Kerkhoff Intermittent Resistance Fault Detection at Board Level published pages: , ISSN: , DOI:		2019-05-30
2018	Vain,JÃ¼ri; Tsiopoulos, Leonidas; Kharchenko, Vyacheslav; Kaur, Apneet; Jenihhin, Maksim; Raik, Jaan; NÃµmm Sven Energy Efficient Multi-Fragment Markov Model Guided Online Model-Based Testing for MPSoC published pages: , ISSN: , DOI:	Green-IT Engineering: Social, Business and Industrial Applications (1âˆ’21)	2019-05-30
2017	Vain, JÃ¼ri; Tsiopoulos, Leonidas; Kharchenko, Vyacheslav; Kaur, Apneet; Jenihhin, Maksim; Raik, Jaan Multi-fragment Markov model guided online test generation for MPSoC published pages: , ISSN: , DOI:		2019-05-30
2018	Roderick Bloem, Hannes Gross, Rinat Iusupov, Bettina Konighofer, Stefan Mangard, and Johannes Winter Formal Verification of Masked Hardware Implementations in the Presence of Glitches published pages: , ISSN: , DOI:		2019-05-30
2018	G. Ali, H. Ebrahimi, J. Pathrose and H.G. Kerkhoff Design and Implementation of a dependable CPSoC for Automotive Applications published pages: , ISSN: , DOI:		2019-05-30
2017	Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Thilo Kogge, Jaan Raik, Gert Jervan, Thomas Hollstein (Tallinn UT) Comprehensive Performance and Robustness Analysis of 2D Turn Models for Network-on-Chips published pages: , ISSN: , DOI:		2019-05-30
2017	Heinz Riener, RÃ¼diger Ehlers, GÃ¶rschwin Fey (DLR) CEGAR-based EF Synthesis of Boolean Functions with an Application to Circuit Rectification published pages: , ISSN: , DOI:		2019-05-30
2016	Heinz Riener, Robert KÃ¶nighofer, GÃ¶rschwin Fey, and Roderick Bloem (DLR, TU Graz) SMT-Based CPS Parameter Synthesis published pages: , ISSN: , DOI:	Applied Verification for Continuous and Hybrid Systems	2019-05-30
2017	Tino Flenker and Goerschwin Fey (DLR) Mapping Abstract and Concrete Hardware Models for Design Understanding published pages: , ISSN: , DOI:		2019-05-30
2016	Maksim Jenihhin, Giovanni Squillero, Thiago Santos Copetti, Valentin Tihhomirov, Sergei Kostin, Marco Gaudesi, Fabian Vargas, Jaan Raik, Matteo Sonza Reorda, Leticia Bolzani Poehls, Raimund Ubar, Guilherme Cardoso Medeiros Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits published pages: 273-289, ISSN: 0923-8174, DOI: 10.1007/s10836-016-5589-x	Journal of Electronic Testing 32/3	2019-05-30
2016	Ali, G. and Badawy, A. and Kerkhoff, H.G. (U.Twente) Accessing on-chip temperature health monitors using the IEEE 1687 standard published pages: 776-779, ISSN: , DOI:		2019-05-30
2017	Siavoosh Payandeh Azad, Behrad Niazmand, Karl Janson, Nevin George, Adeboye Stephen Oyeniran, Tsotne Putkaradze, Apneet Kaur, Jaan Raik, Gert Jervan, Raimund Ubar, Thomas Hollstein (Tallinn UT) From Online Fault Detection to Fault Management in NoC Routers: A Ground-up Approach published pages: , ISSN: , DOI:		2019-05-30
2016	Heinz Riener and Goerschwin Fey (DLR) Counterexample-Guided Diagnosis published pages: , ISSN: , DOI:		2019-05-30
2016	A. Zambrano On-line Monitoring of Maximum Angle Error in AMR Sensors published pages: , ISSN: , DOI:		2019-05-30
2016	Copetti, Thiago; Medeiros, Guilherme; Poehls, Leticia; Vargas, Fabian; Kostin, Sergei; Jenihhin, Maksim; Raik, Jaan (Tallinn UT) Gate-Level Modelling of NBTI-Induced Delays Under Process Variations published pages: 75-80, ISSN: , DOI:		2019-05-30
2016	Siavoosh Payandeh Azad, Behrad Niazmand, Jaan Raik, Gert Jervan, Thomas Hollstein (Tallinn UT) Holistic Approach for Fault-Tolerant Network-on-Chip based Many-Core Systems published pages: , ISSN: , DOI:		2019-05-30
2017	Konstantin Shibin, Sergei Devadze, Artur Jutman, Martin Grabmann, Robin Pricken Health Management for Self-Aware SoCs Based on IEEE 1687 Infrastructure published pages: 27-35, ISSN: 2168-2356, DOI: 10.1109/MDAT.2017.2750902	IEEE Design & Test 34/6	2019-05-30
2017	Siavoosh Payandeh Azad, Behrad Niazmand, Apneet Kaur Sandhu, Jaan Raik, Gert Jervan, Thomas Hollstein (Tallinn UT) Automated Area and Coverage Optimization of Minimal Latency Checkers published pages: , ISSN: , DOI:		2019-05-30
2017	Heinz Riener and Goerschwin Fey (DLR) Computing Exact Fault Candidates Incrementally published pages: , ISSN: , DOI:		2019-05-30
2016	Zhao, Yong and Kerkhoff, H.G. (U.Twente) A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing published pages: 10-14, ISSN: , DOI:		2019-05-30
2016	Karputkin, Anton; Raik, Jaan A Synthesis-Agnostic Behavioral Fault Model for High Gate-Level Fault Coverage published pages: , ISSN: , DOI:		2019-05-30
2016	A. Jutman, K. Shibin, S. Devadze (Testonica Lab) Reliable Health Monitoring and Fault Management Infrastructure based on Embedded Instrumentation and IEEE 1687 published pages: 240-249, ISSN: , DOI:		2019-05-30
2016	Jenihhin, Maksim; Squillero, Giovanni; Copetti, Thiago Santos; Tihhomirov, Valentin; Kostin, Sergei; Gaudesi, Marco; Vargas, Fabian; Raik, Jaan; Sonza Reorda, Matteo; Bolzani Poehls, Leticia; Ubar, Raimund; Medeiros, Guilherme Cardoso Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits published pages: , ISSN: , DOI:	Journal of Electronic Testing-Theory and Applications (JETTA)	2019-05-30
2016	Jan Malburg, Alexander Finder, GÃ¶rschwin Fey (DLR) Debugging hardware designs using dynamic dependency graphs published pages: , ISSN: 0141-9331, DOI:	Journal of Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)	2019-05-30
2017	Heinz Riener, Ruediger Ehlers, and Goerschwin Fey (DLR) Counterexample-Guided EF Synthesis of Boolean Functions published pages: , ISSN: , DOI:		2019-05-30
2016	Heinz Riener, Robert KÃ¶nighofer, GÃ¶rschwin Fey, and Roderick Bloem SMT-Based CPS Parameter Synthesis published pages: , ISSN: , DOI:		2019-05-30
2015	Bernhard K. Aichernig, Harald Brandl, Elisabeth JÃ¶bstl, Willibald Krenn, Rupert Schlick, Stefan Tiran Killing strategies for model-based mutation testing published pages: 716-748, ISSN: 0960-0833, DOI: 10.1002/stvr.1522	Software Testing, Verification and Reliability 25/8	2019-05-30
2016	K. Shibin, S. Devadze, A. Jutman On-line Fault Classification and Handling in IEEE1687 based Fault Management System for Complex SoCs published pages: , ISSN: , DOI:		2019-05-30
2016	Bernhard Aichernig, Roderick Bloem, Franz Pernkopf, Franz RÃ¶ck, Tobias Schrank and Martin Tappler (TU Graz) Learning Models of a Network Protocol using Neural Network Language Models published pages: , ISSN: , DOI:		2019-05-30
2018	G. Ali, J. Pathrose, Y. Zhao and H.G. Kerkhoff On-Chip Lifetime Prediction for Dependable Many-Processor SoCs based on Slack-Delay and IDDX Data Fusion published pages: , ISSN: , DOI:		2019-05-30
2017	Laura Humphrey, Bettina KÃ¶nighofer, Robert KÃ¶nighofer, Ufuk Topcu Synthesis of Admissible Shield published pages: 134-151, ISSN: , DOI: 10.1007/978-3-319-49052-6_9		2019-05-30
2016	Jinbo Wan, Hans Kerkhoff, Jaap Bisschop Simulating NBTI Degradation in Arbitrary Stressed Analog/Mixed-Signal Environments published pages: 1-1, ISSN: 1536-125X, DOI: 10.1109/TNANO.2015.2505092	IEEE Transactions on Nanotechnology	2019-05-30
2016	A. Jutman, S. Devadze, K. Shibin (Testonica Lab) Synchronization, Calibration and Triggering of IEEE 1687 Embedded Instruments published pages: 1-6, ISSN: , DOI:		2019-05-30
2017	Jan Malburg, Tino Flenker, GÃ¶rschwin Fey (DLR) Property Mining using Dynamic Dependency Graphs published pages: , ISSN: , DOI: 10.1109/ASPDAC.2017.7858327		2019-05-30
2016	Siavoosh Payandeh Azad, Behrad Niazmand, Peeter Ellervee, Jaan Raik, Gert Jervan, Thomas Hollstein (Tallinn UT) SoCDepÂ²: A framework for dependable task deployment on many-core systems under mixed-criticality constraints published pages: , ISSN: , DOI:		2019-05-30
2016	Niels Thole, Lorena Anghel, and Goerschwin Fey A hybrid algorithm to conservatively check the robustness of circuits published pages: , ISSN: , DOI:		2019-05-30
2016	Tino Flenker and Goerschwin Fey Matching abstract and concrete hardware models for design understanding published pages: , ISSN: , DOI:		2019-05-30
2016	Heinz Riener, Finn Haedicke, Stefan Frehse, Mathias Soeken, Daniel GroÃŸe, Rolf Drechsler, Goerschwin Fey metaSMT: focus on your application and not on solver integration published pages: , ISSN: 1433-2779, DOI: 10.1007/s10009-016-0426-1	International Journal on Software Tools for Technology Transfer	2019-05-30
2016	G. Ali , A. Badewy and H.G. Kerkhoff Online Management of Temperature Health Monitors using the IEEE 1687 Standard published pages: , ISSN: , DOI:		2019-05-30
2018	Ofenloch, Annika and Greif, Fabian A Flexible Distributed Simulation Environment for Cyber-Physical Systems Using ZeroMQ published pages: , ISSN: , DOI:	Journal of Communications	2019-05-30
2017	Jan Malburg, Heinz Riener, Goerschwin Fey (DLR) Mining Latency Guarantees for RT-level Designs published pages: , ISSN: , DOI:		2019-05-30
2018	Malburg, Jan and Riener, Heinz and Fey, GÃ¶rschwin Mining Latency Guarantees for RTL Designs published pages: , ISSN: , DOI:		2019-05-30

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