INTEGRADE
Integrating Graphene Devices
| Coordinatore | UNIVERSITAET SIEGEN
Spiacenti, non ci sono informazioni su questo coordinatore. Contattare Fabio per maggiori infomrazioni, grazie. |
| Nazionalità Coordinatore | Germany [DE] |
| Totale costo | 1˙498˙687 € |
| EC contributo | 1˙498˙687 € |
| Programma | FP7-IDEAS-ERC
Specific programme: "Ideas" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013) |
| Code Call | ERC-2012-StG_20111012 |
| Funding Scheme | ERC-SG |
| Anno di inizio | 2012 |
| Periodo (anno-mese-giorno) | 2012-09-01 - 2017-08-31 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
KUNGLIGA TEKNISKA HOEGSKOLAN
Organization address
address: Valhallavaegen 79 contact info |
SE (STOCKHOLM) | beneficiary | 35˙256.00 |
| 2 |
UNIVERSITAET SIEGEN
Organization address
address: HERRENGARTEN 3 contact info |
DE (SIEGEN) | hostInstitution | 1˙463˙431.00 |
| 3 |
UNIVERSITAET SIEGEN
Organization address
address: HERRENGARTEN 3 contact info |
DE (SIEGEN) | hostInstitution | 1˙463˙431.00 |
Mappa
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Obiettivo del progetto (Objective)
'Technology requirements for future IC systems include low power computing and communication, sensing capabilities and energy harvesting. These will unlikely be met with silicon technology alone. The proposed research therefore investigates graphene as a potential alternative technology and contributes to bridging the “valley of death” in innovation that is all too present in Europe. In detail, the proposal focuses on the experimental exploration of novel (opto-) electronic devices and systems based on graphene. Strong emphasis is put on integration, defined as an interdisciplinary approach combining graphene manufacturing, graphene process technology, device engineering and -physics as well as system design. This kind of approach is urgently needed in order to open new horizons for graphene, because it enables a transition from fascinating science to a realistic demonstration of graphene’s application potential in electronics and optoelectronics. The first requirement for the applicability of graphene in ICT is a scalable graphene fabrication technology that can be co-integrated with silicon. The second logical aspect to be investigated is the intricate relationship between process technology and graphene device performance. The third aspect to be considered when discussing integration is how devices can be integrated in existing or future systems, including questions of circuit design. Will graphene systems outperform existing solutions and thus replace them? Will new functionalities emerge and generate novel applications? Hence, the key objectives of this proposal are: 1) a scalable, CMOS compatible large area fabrication technology for graphene and graphene devices, 2) demonstration and assessment of performance advantages and new functionalities of RF graphene devices, 3) high performance graphene-based optoelectronic devices integrated with silicon technology and 4) experimental exploration of the performance potential of graphene-based integrated systems.'