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NANOxCOMP SIGNED

Synthesis and Performance Optimization of a Switching Nano-crossbar Computer

Total Cost €

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EC-Contrib. €

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Partnership

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Project "NANOxCOMP" data sheet

The following table provides information about the project.

Coordinator
ISTANBUL TEKNIK UNIVERSITESI 

Organization address
address: AYAZAGA KAMPUSU
city: MASLAK ISTANBUL
postcode: 34469
website: www.itu.edu.tr

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Turkey [TR]
 Project website http://www.nanoxcomp.itu.edu.tr
 Total cost 577˙035 €
 EC max contribution 577˙035 € (100%)
 Programme 1. H2020-EU.1.3.3. (Stimulating innovation by means of cross-fertilisation of knowledge)
 Code Call H2020-MSCA-RISE-2015
 Funding Scheme MSCA-RISE
 Starting year 2015
 Duration (year-month-day) from 2015-12-01   to  2019-11-30

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    ISTANBUL TEKNIK UNIVERSITESI TR (MASLAK ISTANBUL) coordinator 334˙935.00
2    DIMOKRITIO PANEPISTIMIO THRAKIS EL (KOMOTINI) participant 81˙000.00
3    KARLSRUHER INSTITUT FUER TECHNOLOGIE DE (KARLSRUHE) participant 70˙650.00
4    UNIVERSITA DEGLI STUDI DI MILANO IT (MILANO) participant 66˙600.00
5    INSTITUT POLYTECHNIQUE DE GRENOBLE FR (GRENOBLE CEDEX 1) participant 23˙850.00
6    IROC TECHNOLOGIES SA FR (GRENOBLE) participant 0.00
7    TRUSTEES OF PURDUE UNIVERSITY US (WEST LAFAYETTE) partner 0.00
8    UNIVERSITY OF MASSACHUSETTS US (AMHERST) partner 0.00
9    UNIVERSITY OF VIRGINIA US (CHARLOTTESVILLE) partner 0.00

Map

 Project objective

The main goal of this project is developing a complete synthesis and optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. New computing models for diode, FET, and four-terminal switch based nanoarrays are developed. The proposed methodology implements both arithmetic and memory elements, necessitated by achieving a computer, by considering performance parameters such as area, delay, power dissipation, and reliability. With combination of arithmetic and memory elements a synchronous state machine (SSM), representation of a computer, is realized. The proposed methodology targets variety of emerging technologies including nanowire/nanotube crossbar arrays, magnetic switch-based structures, and crossbar memories. The results of this project will be a foundation of nano-crossbar based circuit design techniques and greatly contribute to the construction of emerging computers beyond CMOS.

The topic of this project can be considered under the research area of “Emerging Computing Models” or “Computational Nanoelectronics”, more specifically the design, modeling, and simulation of new nanoscale switches beyond CMOS. The topic is well addressed and fit in H2020 work programmes FET (Future and Emerging Technologies) and ICT-25 (Generic Micro- and Nano-electronic Technologies).

 Deliverables

List of deliverables.
Patent and/or Journal paper-2 Documents, reports 2020-01-28 10:36:14
Conference paper-2 Documents, reports 2020-01-28 10:36:14
Patent and/or Journal paper-1 Documents, reports 2020-01-28 10:36:14
Report and/or Article Documents, reports 2020-01-28 10:36:14
Synthesis tool Other 2020-01-28 10:36:13
Performance optimization tool Other 2020-01-28 10:36:13
Journal papers Documents, reports 2020-01-28 10:36:14
Conference paper-1 Documents, reports 2020-01-28 10:36:13

Take a look to the deliverables list in detail:  detailed list of NANOxCOMP deliverables.

 Publications

year authors and title journal last update
List of publications.
2018 Furkan Peker, Mustafa Altun
A Fast Hill Climbing Algorithm for Defect and Variation Tolerant Logic Mapping of Nano-Crossbar Arrays
published pages: 522-532, ISSN: 2332-7766, DOI: 10.1109/tmscs.2018.2829518
IEEE Transactions on Multi-Scale Computing Systems 4/4 2020-03-05
2019 Mesut Atasoyu, Mustafa Altun, Serdar Ozoguz
Sensing schemes for STT-MRAMs structured with high TMR in low RA MTJs
published pages: 30-36, ISSN: 0026-2692, DOI: 10.1016/j.mejo.2019.05.008
Microelectronics Journal 89 2020-03-05
2018 Onur Tunali, M. Ceylan Morgul, Mustafa Altun
Defect-Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation
published pages: 22-31, ISSN: 0272-1732, DOI: 10.1109/mm.2018.053631138
IEEE Micro 38/5 2020-03-05
2019 M. Ceylan Morgül, Mustafa Altun
Optimal and heuristic algorithms to synthesize lattices of four-terminal switches
published pages: 60-70, ISSN: 0167-9260, DOI: 10.1016/j.vlsi.2018.08.002
Integration 64 2020-03-05
2018 Onur Tunali, Mustafa Altun
A Survey of Fault-Tolerance Algorithms for Reconfigurable Nano-Crossbar Arrays
published pages: 1-35, ISSN: 0360-0300, DOI: 10.1145/3125641
ACM Computing Surveys 50/6 2020-03-05
2018 Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco
Composition of switching lattices for regular and for decomposed functions
published pages: 207-218, ISSN: 0141-9331, DOI: 10.1016/j.micpro.2018.05.004
Microprocessors and Microsystems 60 2020-02-27
2019 Levent Aksoy, Mustafa Altun
Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices
published pages: 1-1, ISSN: 0018-9340, DOI: 10.1109/tc.2019.2950663
IEEE Transactions on Computers 2020-01-28
2018 Anna Bernasconi, Valentina Ciriani, Luca Frontini, Valentino Liberali, Gabriella Trucco, Tiziano Villa
Enhancing logic synthesis of switching lattices by generalized Shannon decomposition methods
published pages: 193-203, ISSN: 0141-9331, DOI: 10.1016/j.micpro.2017.12.003
Microprocessors and Microsystems 56 2020-01-28
2017 Dan Alexandrescu, Mustafa Altun, Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Mehdi Tahoori
Logic synthesis and testing techniques for switching nano-crossbar arrays
published pages: 14-25, ISSN: 0141-9331, DOI: 10.1016/j.micpro.2017.08.004
Microprocessors and Microsystems 54 2020-01-28
2017 Onur Tunali, Mustafa Altun
Permanent and Transient Fault Tolerance for Reconfigurable Nano-Crossbar Arrays
published pages: 1-1, ISSN: 0278-0070, DOI: 10.1109/TCAD.2016.2602804
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2020-01-28

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