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MODES

Monolithic Optoelectronic Devices on Silicon

Total Cost €

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EC-Contrib. €

0

Partnership

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 MODES project word cloud

Explore the words cloud of the MODES project. It provides you a very rough idea of what is the project "MODES" about.

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Project "MODES" data sheet

The following table provides information about the project.

Coordinator
IBM RESEARCH GMBH 

Organization address
address: SAEUMERSTRASSE 4
city: RUESCHLIKON
postcode: 8803
website: www.zurich.ibm.com

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Switzerland [CH]
 Project website https://www.zurich.ibm.com/modes/
 Total cost 175˙419 €
 EC max contribution 175˙419 € (100%)
 Programme 1. H2020-EU.1.3.2. (Nurturing excellence by means of cross-border and cross-sector mobility)
 Code Call H2020-MSCA-IF-2015
 Funding Scheme MSCA-IF-EF-ST
 Starting year 2016
 Duration (year-month-day) from 2016-07-01   to  2018-06-30

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    IBM RESEARCH GMBH CH (RUESCHLIKON) coordinator 175˙419.00

Map

 Project objective

Nowadays, microelectronics set the pace for the whole knowledge-based economy and society in terms of the ever rising demand for mobile devices and the exponentially growing internet data transfer. However, the widening gap between the increasing number of transistors on a single Si chip and the delivered performance indicates the approaching limits of classical device scaling. Additionally, this miniaturization results in severe energy dissipation in the interconnection of devices. A smart way to overcome this emerging power consumption crisis is to avoid heating by replacing the on-chip and/or chip-to-chip electrical interconnects with optical interconnects. Due to their direct bandgap, III-V compounds are ideal for the integration of photonics with Si-based electronics on the very same chip. This would enable large-scale optoelectronics integration hindered so far by coupling- and overlay issues introduced by state-of-the-art III-V bonding on Silicon. MODES will develop and investigate a novel approach for self-aligned monolithic integration of active and passive III-V optoelectronic devices on a Silicon platform. It focuses on the optimization of GaAs- and InP-based III-V growth within customized oxide templates. Moreover, this research aims at designing and fabricating doped, defect-free III-V heterostructures for electrically-driven optoelectronic devices integrated on Si. Owing to his experience in epitaxy as well as fabrication and characterization of group IV photonics, i.e. laser devices, the fellow complements ideally the competences of the group in III-V epitaxy and fabrication as well as knowledge of design and characterization of optoelectronic devices. Three objectives will be pursued: 1) Growth and integration of III-V material with Si-on-insulator waveguides 2) Design and fabrication of passive and active photonic devices based on integrated III-V materials and Si waveguides 3) Optical and electrical characterization of the photonic components.

 Publications

year authors and title journal last update
List of publications.
2017 Johannes Gooth, Mattias Borg, Heinz Schmid, Vanessa Schaller, Stephan Wirths, Kirsten Moselund, Mathieu Luisier, Siegfried Karg, Heike Riel
Ballistic One-Dimensional InAs Nanowire Cross-Junction Interconnects
published pages: 2596-2602, ISSN: 1530-6984, DOI: 10.1021/acs.nanolett.7b00400
Nano Letters 17/4 2019-07-26
2017 G. Signorello, S. Sant, N. Bologna, M. Schraff, U. Drechsler, H. Schmid, S. Wirths, M. D. Rossell, A. Schenk, H. Riel
Manipulating Surface States of III–V Nanowires with Uniaxial Stress
published pages: 2816-2824, ISSN: 1530-6984, DOI: 10.1021/acs.nanolett.6b05098
Nano Letters 17/5 2019-07-26

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