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EPI SGA1 SIGNED

SGA1 (Specific Grant Agreement 1) OF THE EUROPEAN PROCESSOR INITIATIVE (EPI)

Total Cost €

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EC-Contrib. €

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Partnership

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Project "EPI SGA1" data sheet

The following table provides information about the project.

Coordinator
BULL SAS 

Organization address
address: RUE JEAN JAURES 68
city: LES CLAYES SOUS BOIS
postcode: 78340
website: www.bull.com

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country France [FR]
 Project website https://www.european-processor-initiative.eu
 Total cost 79˙991˙745 €
 EC max contribution 79˙991˙745 € (100%)
 Programme 1. H2020-EU.2.1.1.2. (Next generation computing: Advanced and secure computing systems and technologies, including cloud computing)
 Code Call H2020-SGA-LPMT-2018
 Funding Scheme SGA-RIA
 Starting year 2018
 Duration (year-month-day) from 2018-12-01   to  2021-11-30

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    BULL SAS FR (LES CLAYES SOUS BOIS) coordinator 16˙695˙696.00
2    COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES FR (PARIS 15) participant 10˙738˙081.00
3    INFINEON TECHNOLOGIES AG DE (NEUBIBERG) participant 8˙472˙375.00
4    BARCELONA SUPERCOMPUTING CENTER - CENTRO NACIONAL DE SUPERCOMPUTACION ES (BARCELONA) participant 7˙103˙750.00
5    SIPEARL FR (MAISONS LAFFITTE) participant 6˙212˙688.00
6    FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V. DE (MUNCHEN) participant 3˙301˙750.00
7    IDRYMA TECHNOLOGIAS KAI EREVNAS EL (IRAKLEIO) participant 2˙769˙750.00
8    ALMA MATER STUDIORUM - UNIVERSITA DI BOLOGNA IT (BOLOGNA) participant 2˙281˙875.00
9    BAYERISCHE MOTOREN WERKE AKTIENGESELLSCHAFT DE (MUENCHEN) participant 2˙225˙142.00
10    SEMIDYNAMICS TECHNOLOGY SERVICES SL ES (BARCELONA) participant 1˙826˙250.00
11    EIDGENOESSISCHE TECHNISCHE HOCHSCHULE ZUERICH CH (ZUERICH) participant 1˙820˙000.00
12    KALRAY SA FR (MONTBONNOT) participant 1˙791˙875.00
13    E4 COMPUTER ENGINEERING SPA IT (SCANDIANO) participant 1˙605˙623.00
14    STMICROELECTRONICS SRL IT (AGRATE BRIANZA) participant 1˙546˙250.00
15    UNIVERSITA DI PISA IT (PISA) participant 1˙537˙500.00
16    PROVE&RUN FR (PARIS) participant 1˙528˙800.00
17    EXTOLL GMBH DE (MANNHEIM) participant 1˙498˙050.00
18    CHALMERS TEKNISKA HOEGSKOLA AB SE (GOETEBORG) participant 1˙448˙250.00
19    SVEUCILISTE U ZAGREBU FAKULTET ELEKTROTEHNIKE I RACUNARSTVA HR (ZAGREB) participant 1˙353˙750.00
20    FORSCHUNGSZENTRUM JULICH GMBH DE (JULICH) participant 1˙296˙750.00
21    ELEKTROBIT AUTOMOTIVE GMBH DE (ERLANGEN) participant 1˙188˙875.00
22    INSTITUTO SUPERIOR TECNICO PT (LISBOA) participant 551˙037.00
23    MENTA SAS FR (SOPHIA ANTIPOLIS) participant 471˙125.00
24    KARLSRUHER INSTITUT FUER TECHNOLOGIE DE (KARLSRUHE) participant 287˙250.00
25    CINECA CONSORZIO INTERUNIVERSITARIO IT (CASALECCHIO DI RENO BO) participant 258˙750.00
26    SURFSARA BV NL (AMSTERDAM) participant 121˙750.00
27    GRAND EQUIPEMENT NATIONAL DE CALCUL INTENSIF FR (PARIS) participant 58˙750.00

Map

 Project objective

The EPI SGA1 project will be the first phase of the European Processor Initiative FPA, whose aim is to design and implement a roadmap for a new family of low-power European processors for extreme scale computing, high-performance Big-Data and a range of emerging applications. EPI SGA1 will: - Develop the roadmap for the full length of the EPI initiative - Develop the first generation of technologies through a co-design approach (IPs for general-purpose HPC processors, for accelerators, for trusted chips, software stacks and boards) - Tape-out of the first generation chip by integrating the IPs developed - Validate this chip in the HPC context and in the automotive context using a demonstration platform The project will deliver a high performance, low power processor, implementing vector instructions and specific accelerators with high bandwidth memory access. The EPI processor will also meet high security and safety requirements. This will be achieved through intensive use of simulation, development of a complete software stack and tape-out in the most advanced semiconductor process node. SGA1 will provide a competitive chip that can effectively address the requirements of the HPC, AI, automotive and trusted IT infrastructure markets.

 Deliverables

List of deliverables.
Dissemination and Communication plan Other 2020-04-09 20:17:20
Periodic Dissemination and Communication report (M12) Documents, reports 2020-04-09 20:17:31

Take a look to the deliverables list in detail:  detailed list of EPI SGA1 deliverables.

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The information about "EPI SGA1" are provided by the European Opendata Portal: CORDIS opendata.

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