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Twinning to Strengthen Tallinn University of Technology’s Research and Innovation Capacity in Nanoelectronics Based Dependable Cyber-Physical Systems

Total Cost €


EC-Contrib. €






Project "TUTORIAL" data sheet

The following table provides information about the project.


Organization address
address: Ehitajate tee 5
postcode: 12616

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Estonia [EE]
 Project website
 Total cost 1˙000˙453 €
 EC max contribution 999˙953 € (100%)
 Programme 1. H2020-EU.4.b. (Twinning of research institutions)
 Code Call H2020-TWINN-2015
 Funding Scheme CSA
 Starting year 2016
 Duration (year-month-day) from 2016-01-01   to  2018-12-31


Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    TALLINNA TEHNIKAULIKOOL EE (TALLINN) coordinator 515˙818.00
3    TECHNISCHE UNIVERSITEIT DELFT NL (DELFT) participant 162˙120.00
4    POLITECNICO DI TORINO IT (TORINO) participant 158˙452.00


 Project objective

The overall aim of the TUTORIAL project is to boost the scientific excellence and technology-transfer capacity in nanoelectronics based dependable cyber-physical systems (NBDCPS) of Tallinn University of Technology (TUT) by creating a network with the high-quality Twinning partners: Delft University of Technology (TU Delft), Politecnico di Torino (POLITO) and Deutsches Zentrum für Luft- und Raumfahrt (DLR). To achieve this aim, the 3 year project will build upon the existing strong research and innovation base of TUT and its Twinning partners.

To boost their scientific excellence and technology transfer capacity in NBDCPS, the partners will implement a research and innovation strategy focused on three sub-topics:

1. Reliable nanoelectronics technologies – TUT with TU Delft, 2. In-field test for safety-critical systems – TUT with POLITO, and 3. Dependable cyber-physical systems for space applications – TUT with DLR

The research and innovation strategy takes into account the recent SWOT analysis of TUT and has the following objectives:

• Objective 1: Strengthen TUT’s research excellence in NBDCPS • Objective 2: Enhance the research and innovation capacity of TUT and the Twinning partners • Objective 3: Raise the research profile of TUT and the Twinning Partners • Objective 4: Contribute to the SMART Specialisation Strategy of Estonia • Objective 5: Support research and innovation on a European level

In order to achieve these objectives, the consortium partners will implement a comprehensive set of measures via the project’s work packages:

• Short term staff exchanges (WP1); • Training workshops, conferences and summer schools (WP2); • Dissemination and outreach (WP3).


List of deliverables.
Project leaflet and poster Websites, patent fillings, videos etc. 2019-10-15 10:18:51
Project website Websites, patent fillings, videos etc. 2019-10-15 10:18:51
Promotion guide about TUT Websites, patent fillings, videos etc. 2019-10-15 10:18:51
Project newsletters Websites, patent fillings, videos etc. 2019-10-15 10:18:49

Take a look to the deliverables list in detail:  detailed list of TUTORIAL deliverables.


year authors and title journal last update
List of publications.
2017 Konstantin Shibin, Sergei Devadze, Artur Jutman, Martin Grabmann, Robin Pricken
Health Management for Self-Aware SoCs Based on IEEE 1687 Infrastructure
published pages: 27-35, ISSN: 2168-2356, DOI: 10.1109/MDAT.2017.2750902
IEEE Design & Test 34/6 2019-10-15
2017 Igor Aleksejev, Artur Jutman, Sergei Devadze
Run-time reconfigurable instruments for advanced board-level testing
published pages: 23-30, ISSN: 1094-6969, DOI: 10.1109/MIM.2017.8006390
IEEE Instrumentation & Measurement Magazine 20/4 2019-10-15
2017 Raimund Ubar, Lembit Jürimägi, Jaan Raik, Vladimir Viies
Modeling and simulation of circuits with shared structurally synthesized BDDs
published pages: 56-61, ISSN: 0141-9331, DOI: 10.1016/j.micpro.2016.09.006
Microprocessors and Microsystems 48 2019-10-15
2016 Maksim Jenihhin, Giovanni Squillero, Thiago Santos Copetti, Valentin Tihhomirov, Sergei Kostin, Marco Gaudesi, Fabian Vargas, Jaan Raik, Matteo Sonza Reorda, Leticia Bolzani Poehls, Raimund Ubar, Guilherme Cardoso Medeiros
Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale Circuits
published pages: 273-289, ISSN: 0923-8174, DOI: 10.1007/s10836-016-5589-x
Journal of Electronic Testing 32/3 2019-10-15
2018 Raimund Ubar, Sergei Kostin, Maksim Jenihhin, Jaan Raik, Lembit Jürimägi
Fast identification of true critical paths in sequential circuits
published pages: 252-261, ISSN: 0026-2714, DOI: 10.1016/j.microrel.2017.11.027
Microelectronics Reliability 81 2019-10-15
2016 Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
Fast Data Sort based on Searching Networks with Ring Pipeline
published pages: , ISSN: 1392-1215, DOI: 10.5755/j01.eie.22.4.15920
Elektronika ir Elektrotechnika 22/4 2019-10-15
2018 Laura Päeske, Maie Bachmann, Toomas Põld, Sara Pereira Mendes de Oliveira, Jaanus Lass, Jaan Raik, Hiie Hinrikus
Surrogate Data Method Requires End-Matched Segmentation of Electroencephalographic Signals to Estimate Non-linearity
published pages: , ISSN: 1664-042X, DOI: 10.3389/fphys.2018.01350
Frontiers in Physiology 9 2019-10-15
2017 Põld, Janari; Kalja, Ahto; Robal, Tarmo
Refactoring - key to success for constantly developed projects
published pages: , ISSN: , DOI: 10.3233/978-1-61499-720-7-13
2017 Peeter Ellervee, Jari Nurmi
Guest Editorial: Implementation Issues in System-on-Chip
published pages: 269-270, ISSN: 1939-8018, DOI: 10.1007/s11265-017-1242-x
Journal of Signal Processing Systems 87/3 2019-10-15
2017 V Sklyarov, I Skliarova, A Rjabov, A Sudnitson
Fast iterative circuits and RAM-based mergers to accelerate data sort in software/hardware systems
published pages: 323, ISSN: 1736-6046, DOI: 10.3176/proc.2017.3.07
Proceedings of the Estonian Academy of Sciences 66/3 2019-10-15
2016 Syed Mohammad Asad Hassan Jafri, Muhammad Adeel Tajammul, Ahmed Hemani, Kolin Paul, Juha Plosila, Peeter Ellervee, Hannu Tenuhnen
Polymorphic Configuration Architecture for CGRAs
published pages: 403-407, ISSN: 1063-8210, DOI: 10.1109/tvlsi.2015.2402392
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24/1 2019-10-15
2018 Jevgeni Marenkov, Tarmo Robal, Ahto Kalja
Design-Time Web Usability Evaluation with Guideliner
published pages: 90-109, ISSN: 2255-9922, DOI: 10.7250/csimq.2018-15.05
Complex Systems Informatics and Modeling Quarterly 15 2019-10-15
2016 Marenkov, Jevgeni; Robal, Tarmo; Kalja, Ahto
A framework for improving web application user interfaces through immediate evaluation
published pages: , ISSN: , DOI: 10.3233/978-1-61499-714-6-283
2016 Tarmo Robal, Ahto Kalja
Mining and modelling web user engagement: A survey on academic sites for framework establishment
published pages: 1942-1952, ISSN: , DOI: 10.1109/picmet.2016.7806759
2016 Portland International Conference on Management of Engineering and Technology (PICMET) 2019-10-15
2016 Igor Aleksejev, Sergei Devadze, Artur Jutman, Konstantin Shibin
Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan Architectures
published pages: 245-255, ISSN: 0923-8174, DOI: 10.1007/s10836-016-5588-y
Journal of Electronic Testing 32/3 2019-10-15
2015 Valery Sklyarov, Iouliia Skliarova, Artjom Rjabov, Alexander Sudnitson
Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems
published pages: 126, ISSN: 1841-9836, DOI: 10.15837/ijccc.2016.1.1442
International Journal of Computers Communications & Control 11/1 2019-10-15
2017 Allik, A.; Mägi, S.; Pilt, K.; Karai, D.; Fridolin I.; Leier, M.; Jervan, G.
Comparison of Predictive Equations for Basal Metabolic Rate
published pages: , ISSN: , DOI:

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