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NeuRAM3 SIGNED

NEUral computing aRchitectures in Advanced Monolithic 3D-VLSI nano-technologies

Total Cost €

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EC-Contrib. €

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Partnership

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Project "NeuRAM3" data sheet

The following table provides information about the project.

Coordinator
COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES 

Organization address
address: RUE LEBLANC 25
city: PARIS 15
postcode: 75015
website: www.cea.fr

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country France [FR]
 Total cost 4˙181˙015 €
 EC max contribution 3˙216˙150 € (77%)
 Programme 1. H2020-EU.2.1.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT))
 Code Call H2020-ICT-2015
 Funding Scheme /RIA
 Starting year 2016
 Duration (year-month-day) from 2016-01-01   to  2018-12-31

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES FR (PARIS 15) coordinator 1˙112˙073.00
2    STMICROELECTRONICS S.A. FR (MONTROUGE) participant 510˙000.00
3    AGENCIA ESTATAL CONSEJO SUPERIOR DE INVESTIGACIONES CIENTIFICAS ES (MADRID) participant 483˙220.00
4    CONSIGLIO NAZIONALE DELLE RICERCHE IT (ROMA) participant 400˙590.00
5    JACOBS UNIVERSITY BREMEN GGMBH DE (BREMEN) participant 303˙687.00
6    INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM BE (LEUVEN) participant 251˙578.00
7    STICHTING IMEC NEDERLAND NL (EINDHOVEN) participant 155˙000.00
8    IBM RESEARCH GMBH CH (RUESCHLIKON) participant 0.00
9    UNIVERSITAT ZURICH CH (ZURICH) participant 0.00

Mappa

 Project objective

We propose to fabricate a chip implementing a neuromorphic architecture that supports state-of-the-art machine learning algorithms and spike-based learning mechanisms. With respect to its physical architecture this chip will feature an ultra low power, scalable and highly configurable neural architecture that will deliver a gain of a factor 50x in power consumption on selected applications compared to conventional digital solutions; and a monolithically integrated 3D technology in Fully-Depleted Silicon on Insulator (FDSOI) at 28nm design rules with integrated Resistive Random Access Memory (RRAM) synaptic elements; We will complete this vision and develop complementary technologies that will allow to address the full spectrum of applications from mobile/autonomous objects to high performance computing coprocessing, by realising (1) a technology to implement on-chip learning, using native adaptive characteristics of electronic synaptic elements; and (2) a scalable platform to interconnect multiple neuromorphic processor chips to build large neural processing systems. The neuromorphic computing system will be developed jointly with advanced neural algorithms and computational architectures for online adaptation, learning, and high-throughput on-line signal processing, delivering: 1. An ultra-low power massively parallel non von Neumann computing platform with non-volatile nano-scale devices that support on-line learning mechanisms; 2. A programming toolbox of algorithms and data structures tailored to the specific constraints and opportunities of the physical architecture; 3. An array of fundamental application demonstrations instantiating the basic classes of signal processing tasks. The neural chip will validate the concept and be a first step to develop a European technology platform addressing from ultra-low power data processing in autonomous systems (Internet of Things) to energy efficient large data processing in servers and networks.

 Work performed, outcomes and results:  advancements report(s) 

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The information about "NEURAM3" are provided by the European Opendata Portal: CORDIS opendata.

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