NANOS.BIT

Nanoengineering of self-forming diffusion barriers for interconnect technologies

 Coordinatore THE CHANCELLOR, MASTERS AND SCHOLARS OF THE UNIVERSITY OF OXFORD 

 Organization address address: University Offices, Wellington Square
city: OXFORD
postcode: OX1 2JD

contact info
Titolo: Ms.
Nome: Linda
Cognome: Pialek
Email: send email
Telefono: +44 1865 289800
Fax: +44 1865 289801

 Nazionalità Coordinatore United Kingdom [UK]
 Totale costo 173˙240 €
 EC contributo 173˙240 €
 Programma FP7-PEOPLE
Specific programme "People" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013)
 Code Call FP7-PEOPLE-2009-IEF
 Funding Scheme MC-IEF
 Anno di inizio 2010
 Periodo (anno-mese-giorno) 2010-05-01   -   2012-04-30

 Partecipanti

# participant  country  role  EC contrib. [€] 
1    THE CHANCELLOR, MASTERS AND SCHOLARS OF THE UNIVERSITY OF OXFORD

 Organization address address: University Offices, Wellington Square
city: OXFORD
postcode: OX1 2JD

contact info
Titolo: Ms.
Nome: Linda
Cognome: Pialek
Email: send email
Telefono: +44 1865 289800
Fax: +44 1865 289801

UK (OXFORD) coordinator 173˙240.80

Mappa


 Word cloud

Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.

layers    scem    microscopy    diffusion    techniques    interfaces    interconnects    nm    semiconductor    electron    transmission    copper    silicon    scanning    self    candidate    barriers    forming   

 Obiettivo del progetto (Objective)

'At present, copper is the material of choice in the current processing technology for advanced semiconductor devices interconnects. However, the high diffusion rate between copper and silicon or silicon oxides requires the development of physical barriers to prevent interdiffusion across the interfaces. The thickness of the currently used barriers makes them an unviable option as the semiconductor industry moves from the 45 nm node to 32 nm and beyond, and alternative approaches are required. Some groups have proposed the use of the so called self-forming barriers, which have the potential to overcome the shortcomings of the current approaches. The aim of this project is to characterize and understand the formation of self-forming diffusion barriers layers for transistor interconnects and to optimize the creation process for future generations of device technology, in the framework of a network of European collaborations involving leading laboratories. With this purpose, the candidate will develop and apply a methodology of analysis based on electron beam related techniques in order to study these structures and interfaces at the atomic scale. Among others, aberration-corrected scanning transmission electron microscopy and three dimensional characterization techniques will allow the structure; composition and homogeneity of the barrier layers to be investigated while still remain sandwiched. A promising new technique that will be applied to this system will be scanning confocal electron microscopy (SCEM), which in theory is ideally suited to analytical work on systems with extended planar geometries. Indeed, the researcher in charge at the University of Oxford, is a world reference of leadership in the use of high resolution scanning transmission electron microscopy and in the development of SCEM. This stay abroad will provide the candidate a maturity and an expertise level in this scientific field, essential to develop an independent research career.'

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