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VINEYARD SIGNED

Versatile Integrated Accelerator-based Heterogeneous Data Centres

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EC-Contrib. €

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Partnership

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Project "VINEYARD" data sheet

The following table provides information about the project.

Coordinator
INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS 

Organization address
address: Patission Str. 42
city: ATHINA
postcode: 10682
website: www.iccs.gr

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Greece [EL]
 Project website http://vineyard-h2020.eu
 Total cost 6˙283˙895 €
 EC max contribution 6˙283˙895 € (100%)
 Programme 1. H2020-EU.2.1.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT))
 Code Call H2020-ICT-2015
 Funding Scheme RIA
 Starting year 2016
 Duration (year-month-day) from 2016-02-01   to  2019-01-31

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS EL (ATHINA) coordinator 656˙242.00
2    BULL SAS FR (LES CLAYES SOUS BOIS) participant 1˙011˙550.00
3    MAXELER TECHNOLOGIES LIMITED UK (LONDON) participant 903˙750.00
4    NEURASMUS BV NL (ROTTERDAM) participant 700˙331.00
5    IDRYMA TECHNOLOGIAS KAI EREVNAS EL (IRAKLEIO) participant 666˙250.00
6    THE QUEEN'S UNIVERSITY OF BELFAST UK (BELFAST) participant 663˙625.00
7    LEANXCALE SL ES (BRUNETE MADRID) participant 531˙625.00
8    NEUROCOM LUXEMBOURG SA LU (LUXEMBOURG) participant 448˙125.00
9    UNITED KINGDOM RESEARCH AND INNOVATION UK (SWINDON) participant 260˙521.00
10    GLOBAZ, S.A. PT (OLIVEIRA DE AZEMEIS) participant 244˙375.00
11    HELLENIC EXCHANGES-ATHENS STOCK EXCHANGE SA EL (ATHENS) participant 197˙500.00
12    SCIENCE AND TECHNOLOGY FACILITIES COUNCIL UK (SWINDON) participant 0.00

Map

 Project objective

VINEYARD will develop an integrated platform for energy-efficient data centres based on new servers with novel, coarse-grain and fine-grain, programmable hardware accelerators. It will, also, build a high-level programming framework for allowing end-users to seamlessly utilize these accelerators in heterogeneous computing systems by using typical data-centre programming frameworks (e.g. MapReduce, Storm, Spark, etc.). VINEYARD will develop two types of energy-efficient servers integrating two novel hardware accelerator types: coarse-grain programmable dataflow engines and fine-grain all-programmable FPGAs that accommodate multiple ARM cores. The former will be suitable for data centre applications that can be represented in dataflow graphs while the latter will be used for accelerating applications that need tight communication between the processor and the hardware accelerators. Both types of programmable accelerators will be customized based on application requirements, resulting in higher performance and significantly reduced energy budgets. VINEYARD will additionally develop a new programming framework and the required system software to hide the programming complexity of the resulting heterogeneous system based on the hardware accelerators. This programming framework will also allow the hardware accelerators to be swapped in and out of the heterogeneous infrastructure so as to offer efficient energy use. VINEYARD will foster the expansion of the soft-IP cores industry, currently limited in the embedded systems, to in data centre market. The VINEYARD consortium has strong industrial foundations, and covers the whole value chain in the data-centre ecosystem; from the data-centre vendors up to the data-centre application programmers. VINEYARD plans to demonstrate the advantages of its approach in three real use-cases a) a bioinformatics application for high-accuracy brain modelling, b) two critical financial applications and c) a big-data analysis application.

 Deliverables

List of deliverables.
Report on dissemination and communication activities (final) Documents, reports 2020-04-02 11:24:57
Open Access Repository of FPGA accelerators Open Research Data Pilot 2020-04-02 11:25:33
Final workshop report Documents, reports 2020-04-02 11:25:22
Executive summary Documents, reports 2020-04-02 11:25:11
Report on dissemination and communication activities (intermediate) Documents, reports 2020-03-20 15:49:31
Project website Websites, patent fillings, videos etc. 2020-03-20 15:49:31
Application requirements and specifications Documents, reports 2020-03-20 15:49:31
Public Project Presentation Websites, patent fillings, videos etc. 2020-03-20 15:49:31
Project stationary Websites, patent fillings, videos etc. 2020-03-20 15:49:31

Take a look to the deliverables list in detail:  detailed list of VINEYARD deliverables.

 Publications

year authors and title journal last update
List of publications.
2017 Hans Vandierendonck
D4.2 Programming Language and Runtime System: Early Prototype (executive Summary)
published pages: , ISSN: , DOI: 10.5281/zenodo.898167
1 2020-03-20
2017 Georgios Smaragdos, Georgios Chatzikonstantis, Rahul Kukreja, Harry Sidiropoulos, Dimitrios Rodopoulos, Ioannis Sourdis, Zaid Al-Ars, Christoforos Kachris, Dimitrios Soudris, Chris de Zeeuw, Christos Strydis
BrainFrame: A node-level heterogeneous accelerator platform for neuron simulations
published pages: , ISSN: 1741-2560, DOI: 10.1088/1741-2552/aa7fc5
Journal of Neural Engineering 2020-03-20
2017 Koromilas, Elias; Stamelos, Ioannis; KACHRIS, Christoforos; Soudris. Dimitrios
Spark acceleration on FPGAs: A use case on machine learning in Pynq
published pages: , ISSN: , DOI: 10.5281/zenodo.801506
IEEE MOCAST 2017 1 2020-03-20
2017 Christoforos Kachris; Elias Koromilas; Ioannis Stamelos; Dimitrios Soudris
Spynq: FPGA acceleration of Spark applications in a Pynq cluster
published pages: , ISSN: , DOI: 10.5281/zenodo.996016
IEEE FPL 2017 1 2020-03-20
2016 Hans Vandierendonck
D4.1 Programming Language and Runtime System: Requirements
published pages: , ISSN: , DOI: 10.5281/zenodo.898163
1 2020-03-20
2017 Eleni Kanellou; Nikolaos Chrysos; Angelos Bilas; Christoforos Kachris
D5.1: Accelerator Deployment Models
published pages: , ISSN: , DOI: 10.5281/zenodo.898171
1 2020-03-20
2016 Candela Bravo; Alexandre Almeida; Christoforos Kachris
D8.3 Data Management Plan (Intermediate version)
published pages: , ISSN: , DOI: 10.5281/zenodo.936394
1 2020-03-20
2017 Christoforos Kachris
VINEYARD in the HiPEAC Newsletter info 49
published pages: , ISSN: , DOI: 10.5281/zenodo.836721
HiPEAC newsletter 1 2020-03-20
2017 Christoforos Kachris; Angelos Bilas; Nikos Chrysos; Hans Vandierendonck
D2.3: System architecture
published pages: , ISSN: , DOI: 10.5281/zenodo.898156
1 2020-03-20
2017 Ioannis Stamoulias; Christoforos Kachris; Dimitrios Soudris
Hardware Accelerators for Financial Applications in HDL and High-Level Synthesis
published pages: , ISSN: , DOI: 10.5281/zenodo.836708
IEEE SAMOS 2017 1 2020-03-20
2016 Christoforos Kachris; Dimitrios Soudris
VINEYARD D1.1 Public Project Presentation
published pages: , ISSN: , DOI: 10.5281/zenodo.51477
1 2020-03-20
2016 Candela Bravo; Alexander Almeida
VINEYARD D8.6 Project website
published pages: , ISSN: , DOI: 10.5281/zenodo.51479
1 2020-03-20
2017 Christoforos Kachris; Elias Koromilas; Ioannis Stamelos; Dimitrios Soudris
SPynq: Acceleration of Machine Learning Applications over Spark on Pynq
published pages: , ISSN: , DOI: 10.5281/zenodo.836711
IEEE SAMOS 2017 1 2020-03-20
2016 Barbhuiya, Sakil; Wu, Yun; Murphy, Karen; Vandierendonck, Hans; Karakonstantis, Georgios; Nikolopoulos, Dimitrios
Accelerating Data Center Applications with Reconfigurable DataFlow Engines
published pages: , ISSN: , DOI: 10.5281/zenodo.801522
H2RC 2016 1 2020-03-20
2017 George Chatzikonstantis; Diego Jiménez; Esteban Meneses; Christos Strydis; Harry Sidiropoulos; Dimitrios Soudris
From Knights Corner to Landing: a Case Study Based on a Hodgkin-Huxley Neuron Simulator
published pages: , ISSN: , DOI: 10.5281/zenodo.836676
ISC 2017 1 2020-03-20
2017 Harry Sidiropoulos; Ioannis Koutras; Dimitrios Soudris; Kostas Siozios
Algorithmic and memory optimizations on multiple application mapping onto FPGAs
published pages: , ISSN: , DOI: 10.5281/zenodo.998572
IEEE SAMOS 2017 1 2020-03-20
2016 FORTH; NEURASMUS; ICCS; NEUROCOM; ATHEX; LEANXCALE
D2.2: Workload & Traffic Pattern Characterization (Executive Summary)
published pages: , ISSN: , DOI: 10.5281/zenodo.898150
1 2020-03-20
2016 Christoforos Kachris
VINEYARD in the HiPEAC Newsletter info 45
published pages: , ISSN: , DOI: 10.5281/zenodo.836718
1 2020-03-20
2017 Stelios Mavridis; Manolis Pavlidakis; Christi Symeonidou; Christos Kozanitis; Nikolaos Chrysos; Angelos Bilas; Ioannis Stamoulias; Christoforos Kachris; Dimitrios Soudris
VineTalk: Simplifying Software Access and Sharing of FPGAs in Datacenters
published pages: , ISSN: , DOI: 10.5281/zenodo.996022
IEEE FPL 2017 1 2020-03-20
2019 Umar Ibrahim Minhas; Roger Woods; Georgios Karakonstantis
Evaluation of FPGA Partitioning Schemes for Time and Space Sharing of Heterogeneous Tasks
published pages: , ISSN: , DOI: 10.5281/zenodo.2586979
ARC 2019 2 2020-03-20
2017 Cheol-Ho Hong, Ivor Spence, Dimitrios S. Nikolopoulos
FairGV: Fair and Fast GPU Virtualization
published pages: 3472-3485, ISSN: 1045-9219, DOI: 10.1109/TPDS.2017.2717908
IEEE Transactions on Parallel and Distributed Systems 28/12 2020-03-20

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The information about "VINEYARD" are provided by the European Opendata Portal: CORDIS opendata.

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