ALLOPTICS
ALL-OPTIcal signal processing on-Chip in hybrid III-V/ Si integrated platforms
| Coordinatore | ECOLE CENTRALE DE LYON
Organization address
address: Avenue Guy de Collongue 36 contact info |
| Nazionalità Coordinatore | France [FR] |
| Totale costo | 100˙000 € |
| EC contributo | 100˙000 € |
| Programma | FP7-PEOPLE
Specific programme "People" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013) |
| Code Call | FP7-PEOPLE-2011-CIG |
| Funding Scheme | MC-CIG |
| Anno di inizio | 2012 |
| Periodo (anno-mese-giorno) | 2012-03-01 - 2016-06-22 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
ECOLE CENTRALE DE LYON
Organization address
address: Avenue Guy de Collongue 36 contact info |
FR (ECULLY CEDEX) | coordinator | 100˙000.00 |
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Obiettivo del progetto (Objective)
'The project will lay the foundations of an all-optical signal processing architecture on-chip. The cost, size, and energy requirements of the present electronic equipment that manages network data flows are rapidly reaching crisis point, accelerated by the exponential growth of the global Internet traffic. A promising solution lies in moving to all-optical technologies, where optical data are handled without conversion into electrical signals; this would allow the inherent speed of light and its high data-handling capacity to be fully exploited in the core of the network. The construction of the underlying nonlinear optical functions on-chip requires architectures and materials where the light matter interaction is critically enhanced. Ideally, this technology should be CMOS compatible for ensuring the photonic-electronic convergence, with direct implication on the development of optical interconnects for microelectronics. While silicon photonics has led to various optical nonlinear functions on-chip, the choice of the material, silicon, and the standard waveguide geometry intrinsically constrain the power consumption, the size and the rapidity of the resulting devices. This project will develop new solutions based on III-V/ Si hybrid integration and dispersion engineered slow light photonic crystals, where light matter interaction is promoted. Complementarily, these hybrid III-V/ Si platforms will exploit the respective advantages of silicon, for transferring optical signals with low loss, and III-V, where the magnitude and the nature of the (strong or fast) nonlinearities can be engineered through the alloy composition. The objectives of this project will be (1) the creation of low power and compact optical functions for regenerating and routing high-speed optical signals and (2) more fundamental science with the exploration of active slow light devices and on-chip temporal pulse compression that will prepare the groundwork for future research programs.'