SMARTGATE

"Smart Gates for the ""Green"" Transistor"

 Coordinatore "NATIONAL CENTER FOR SCIENTIFIC RESEARCH ""DEMOKRITOS""" 

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 Nazionalità Coordinatore Greece [EL]
 Totale costo 1˙221˙611 €
 EC contributo 1˙221˙611 €
 Programma FP7-IDEAS-ERC
Specific programme: "Ideas" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013)
 Code Call ERC-2011-ADG_20110209
 Funding Scheme ERC-AG
 Anno di inizio 2012
 Periodo (anno-mese-giorno) 2012-01-01   -   2015-12-31

 Partecipanti

# participant  country  role  EC contrib. [€] 
1    "NATIONAL CENTER FOR SCIENTIFIC RESEARCH ""DEMOKRITOS"""

 Organization address address: Patriarchou Gregoriou Str.
city: AGHIA PARASKEVI
postcode: 15310

contact info
Titolo: Dr.
Nome: Athanasios
Cognome: Dimoulas
Email: send email
Telefono: 302107000000
Fax: 302107000000

EL (AGHIA PARASKEVI) hostInstitution 1˙221˙611.00
2    "NATIONAL CENTER FOR SCIENTIFIC RESEARCH ""DEMOKRITOS"""

 Organization address address: Patriarchou Gregoriou Str.
city: AGHIA PARASKEVI
postcode: 15310

contact info
Titolo: Ms.
Nome: Marina
Cognome: Fontara
Email: send email
Telefono: +30 210 650 30 96
Fax: +30 210 650 31 49

EL (AGHIA PARASKEVI) hostInstitution 1˙221˙611.00

Mappa


 Word cloud

Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.

metallic    power    gate    operation    topological    transistor    insulators    se    overcome    slope    switching    graphene    negative    obtain    smart    voltage    capacitance    bi    density    gates    boltzmann   

 Obiettivo del progetto (Objective)

'Ultra-low voltage/power operation is expected to be an important requirement for future nanoelectronics allowing more dense and fast circuits on one hand and enabling the operation of energy efficient intelligent autonomous systems on the other. In present day devices quite a lot of power is consumed during switching since it requires a minimum bias of 60 mV on the gate to overcome a potential barrier and increase the transistor current by a decade, a process which is fundamentally limited by thermal Boltzmann statistics. We propose the development of novel negative capacitance “smart” gates with a positive feedback and internal amplification to overcome the “Boltzmann tyranny” and obtain steeper slope “green” transistors capable of operating at very low voltage. Metallic systems with a low density of states could provide the required dominant negative contributions to the capacitance due to strong carrier correlation effects. Such metallic systems made of 2D Dirac fermions with linear dispersion bands are supported in graphene and on the surface of the newly discovered topological insulators having the very interesting property that they offer a nearly zero density of states at the band crossing near the charge neutral point. We propose here the graphene and Bi2Se3-based topological insulators as the key components of the targeted “smart” gates. We aim at developing complex gate structures facing the challenges of growth of high purity and high crystalline quality graphene and Bi2Se3 thin films in combination with conventional dielectrics and metals on Si semiconductor in an effort to obtain the required properties and ensure their robust functionality at room temperature. Possible negative capacitance effects will be investigated in terms of generic capacitor electrical characterization, while transistor devices with optimum smart gates will be fabricated to prove the principle of steep slope switching.'

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