MOSILSPIN

Modeling Silicon Spintronics

 Coordinatore TECHNISCHE UNIVERSITAET WIEN 

Spiacenti, non ci sono informazioni su questo coordinatore. Contattare Fabio per maggiori infomrazioni, grazie.

 Nazionalità Coordinatore Austria [AT]
 Totale costo 1˙678˙500 €
 EC contributo 1˙678˙500 €
 Programma FP7-IDEAS-ERC
Specific programme: "Ideas" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013)
 Code Call ERC-2009-AdG
 Funding Scheme ERC-AG
 Anno di inizio 2010
 Periodo (anno-mese-giorno) 2010-03-01   -   2016-02-29

 Partecipanti

# participant  country  role  EC contrib. [€] 
1    TECHNISCHE UNIVERSITAET WIEN

 Organization address address: Karlsplatz 13
city: WIEN
postcode: 1040

contact info
Titolo: Prof.
Nome: Erasmus
Cognome: Langer
Email: send email
Telefono: +43 1 58801 36000
Fax: +43 1 58801 36099

AT (WIEN) hostInstitution 1˙678˙500.00
2    TECHNISCHE UNIVERSITAET WIEN

 Organization address address: Karlsplatz 13
city: WIEN
postcode: 1040

contact info
Titolo: Prof.
Nome: Siegfried
Cognome: Selberherr
Email: send email
Telefono: -94769
Fax: -94858

AT (WIEN) hostInstitution 1˙678˙500.00

Mappa


 Word cloud

Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.

degree    memory    freedom    spin    alternative    microelectronics    silicon    cmos    performance    coherence   

 Obiettivo del progetto (Objective)

'The breath taking increase in performance of integrated circuits became possible by continuous miniaturization of CMOS devices. On this exciting path many tough problems were resolved; however, growing technological challenges and soaring costs will gradually bring scaling to an end. This puts foreseeable limitations to the future performance increase, and research on alternative technologies and computational principles becomes important. Spin attracts attention as alternative to the charge degree of freedom for computations and non-volatile memory applications. Silicon as main material of microelectronics is characterized by negligible spin-orbit interaction and zero-spin nuclei and should display long spin coherence times. Combined with the potentially easy integration with CMOS, long spin coherence makes silicon perfectly suited for spin-driven applications, as confirmed by recent impressive demonstrations of spin injection, coherent propagation, and detection. The success of microelectronics technology has been well assisted by smart Technology Computer-Aided Design tools; however, support for spin applications is entirely absent. The objective here is to create, test, and apply a simulation environment for spin-based devices in silicon. Microscopic models describing the physical properties relevant to the spin degree of freedom are developed. Special attention will be paid to investigate, how to increase the spin coherence time. One option is based on completely removing the valley degeneracy in the conduction band by [110] uniaxial stress. Understanding spin-polarized transport in silicon and in compatible hysteretic materials allows using the spin-torque effect to invent, model, and optimize prototypes of switches and memory cells for the 21st century.'

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