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ULPIoT SIGNED

Ultra-Low Power and Highly-Scalable Interfaces for the Internet of Things

Total Cost €

0

EC-Contrib. €

0

Partnership

0

Views

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 ULPIoT project word cloud

Explore the words cloud of the ULPIoT project. It provides you a very rough idea of what is the project "ULPIoT" about.

things    power    size    really    digital    sensors    density    die    shrinking    serious    circuit    wearable    nodes    reference    technologies    cmos    scaling    more    diffusion    interactions    era    globally    pace    despite    limiting    acquire    surrounding    performance    matching    voltages    5v    scalability    full    re    effectiveness    ic    circuits    thinking    nanoscale    degradation    bottleneck    contrary    foreseeable    view       feasibility    physical    internet    signal    solutions    voltage    hard    electronics    autonomous    entity    operation    area    humans    world    linearity    near    data    substantially    extremely    extended    nowadays    ics    threshold    scenario    keeping    environment    network    frontier    validated    soc    occupy    ratio    fact    functions    capturing    analog    domain    demonstrators    objects    percentage    blocks    cross    interacting    interconnected    iot    integration    verified    exploited    device    consumption    noise    intended   

Project "ULPIoT" data sheet

The following table provides information about the project.

Coordinator
POLITECNICO DI TORINO 

Organization address
address: CORSO DUCA DEGLI ABRUZZI 24
city: TORINO
postcode: 10129
website: www.polito.it

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Italy [IT]
 Project website https://sites.google.com/view/ulpiot/
 Total cost 247˙728 €
 EC max contribution 247˙728 € (100%)
 Programme 1. H2020-EU.1.3.2. (Nurturing excellence by means of cross-border and cross-sector mobility)
 Code Call H2020-MSCA-IF-2015
 Funding Scheme MSCA-IF-GF
 Starting year 2017
 Duration (year-month-day) from 2017-02-01   to  2020-02-28

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    POLITECNICO DI TORINO IT (TORINO) coordinator 247˙728.00
2    NATIONAL UNIVERSITY OF SINGAPORE PUBLIC COMPANY LIMITED BY GUARANTEE SG (SINGAPORE) partner 0.00

Map

 Project objective

The era of the Internet of Things (IoT), in which every physical entity includes power-autonomous embedded electronics, capturing relevant information by sensors and interacting with objects and humans in a globally interconnected network, is bringing about new challenges in Integrated Circuit (IC) design. The performance of ICs in terms of integration density, power consumption and cost, in fact, is the only limiting factor to the feasibility and/or to the widespread diffusion of IoT-based solutions. Digital ICs in the most recent nanoscale CMOS technologies are keeping the pace of IoT requirements. On the contrary, the implementation of analog functions, which are however essential to acquire data from sensors, thus enabling the interactions of IoT nodes with the surrounding environment, is nowadays the real bottleneck and the most serious concern and limiting factor for the further development of IoT applications. In the foreseeable future, the planned device scaling and voltage reduction down to near threshold (e.g. 0.4-0.5V) makes the design of analog circuits extremely hard, in view of the degradation of signal-to-noise ratio, matching and linearity. Despite of device shrinking, traditional low-voltages analog circuits do not really scale down in size, and occupy a more and more relevant percentage (i.e., cost) of the die area. In this scenario, the proposed research activity is intended to substantially enhance the scalability of analog blocks with technology and voltage by re-thinking analog functions in ICs in digital terms. In a new cross-domain approach, design and testing methodologies from the digital world will be extended and frontier design concepts like near-threshold operation further exploited. The effectiveness of the proposed approach will be verified and validated on IC demonstrators and with reference to a full SoC for wearable electronics applications in the development of novel IoT solutions.

 Publications

year authors and title journal last update
List of publications.
2019 Orazio Aiello, Paolo Crovetti, Longyang Lin, Massimo Alioto
A pW-Power Hz-Range Oscillator Operating With a 0.3-1.8-V Unregulated Supply
published pages: 1-10, ISSN: 0018-9200, DOI: 10.1109/jssc.2018.2886336
IEEE Journal of Solid-State Circuits 2019-06-11
2019 Orazio Aiello, Paolo Stefano Crovetti, Massimo Alioto
Fully Synthesizable Low-Area Digital-to-Analog Converter With Graceful Degradation and Dynamic Power-Resolution Scaling
published pages: 1-11, ISSN: 1549-8328, DOI: 10.1109/tcsi.2019.2903464
IEEE Transactions on Circuits and Systems I: Regular Papers 2019-06-11

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