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SAPHIR SIGNED

Scalable DSP algorithms for high performance hardware applied to 5G MaMi systems

Total Cost €

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EC-Contrib. €

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Partnership

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Project "SAPHIR" data sheet

The following table provides information about the project.

Coordinator
INFINEON TECHNOLOGIES AUSTRIA AG 

Organization address
address: SIEMENSSTRASSE 2
city: VILLACH
postcode: 9500
website: www.infineon.com/austria

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Austria [AT]
 Total cost 178˙156 €
 EC max contribution 178˙156 € (100%)
 Programme 1. H2020-EU.1.3.2. (Nurturing excellence by means of cross-border and cross-sector mobility)
 Code Call H2020-MSCA-IF-2017
 Funding Scheme MSCA-IF-EF-SE
 Starting year 2018
 Duration (year-month-day) from 2018-06-01   to  2020-05-31

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    INFINEON TECHNOLOGIES AUSTRIA AG AT (VILLACH) coordinator 178˙156.00

Map

 Project objective

There is persistent demand for radical advancements in telecommunication systems. The digital baseband processing unit (or Digital Signal Processor – DSP) is of paramount importance for the overall performance and it consumes a significant part of the total power. Breakthroughs in terms of accuracy, speed and efficiency are required in custom DSP implementations. To this end we propose to employ ideas that lead to advances in quantum algorithms for scientific computing to obtain silicon integrated circuit implementations meeting the performance expectations. Our experience and the similarities in the efficiency and accuracy requirements between such quantum algorithms and custom silicon-based integrated circuit design have not been exploited. This has a huge potential for obtaining high performance DSP cores in 5G MaMi systems.

We propose to derive DSP algorithms and corresponding digital circuits with performance guarantees in terms of accuracy and speed. In some cases we will be deriving entirely new algorithms and circuits. In others we will investigate the degree to which the existing quantum algorithms for scientific computing can be used as a basis to derive efficient custom integrated circuits for DSP. To address the efficiency requirements and to control the error propagation we propose a modular approach. Algorithms will be composed by combining modules performing sub-tasks. Digital circuits with a priori known error and cost characteristics will be used to implement the different modules. This allows the comparison of the trade-offs between implementation alternatives and paves the way toward fully automatic overall resource optimization in DSP design. The proposed approach will provide a new and sound methodology to design and test custom integrated circuits for next generation communication systems (5G).

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The information about "SAPHIR" are provided by the European Opendata Portal: CORDIS opendata.

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