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TERIPHIC SIGNED

Fabrication and assembly automation of TERabit optical transceivers based on InP EML arrays and a Polymer Host platform for optical InterConnects up to 2 km and beyond

Total Cost €

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EC-Contrib. €

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Partnership

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Project "TERIPHIC" data sheet

The following table provides information about the project.

Coordinator
INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS 

Organization address
address: Patission Str. 42
city: ATHINA
postcode: 10682
website: www.iccs.gr

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Greece [EL]
 Total cost 5˙626˙642 €
 EC max contribution 4˙737˙468 € (84%)
 Programme 1. H2020-EU.2.1.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT))
 Code Call H2020-ICT-2018-2
 Funding Scheme IA
 Starting year 2019
 Duration (year-month-day) from 2019-01-01   to  2021-12-31

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS EL (ATHINA) coordinator 756˙250.00
2    FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V. DE (MUNCHEN) participant 1˙906˙480.00
3    MELLANOX TECHNOLOGIES LTD - MLNX IL (YOKNEAM) participant 875˙411.00
4    III-V LAB FR (PALAISEAU CEDEX) participant 556˙815.00
5    FICONTEC SERVICE GMBH DE (ACHIM) participant 451˙325.00
6    TELECOM ITALIA SPA IT (MILANO) participant 191˙187.00

Map

 Project objective

Efforts to develop optical interfaces with Terabit capacity for datacom applications have kicked off. A practical path to the Terabit regime is to scale the current 400G modules, which are based (in the most forward looking version of the standards) on 4 parallel lanes, each operating with PAM-4 at 53 Gbaud. Scaling these modules by adding lanes looks simple, but entails challenges with respect to the fabrication and assembly complexity that can critically affect their manufacturability and cost. TERIPHIC aims to address these challenges by leveraging photonic integration concepts and developing a seamless chain of component fabrication, assembly automation and module characterization processes as the basis for high-volume production lines of Terabit modules. TERIPHIC will bring together EML arrays in the O-band, PD arrays and a polymer chip that will act as the host platform for the integration of the arrays and the wavelength mux-demux of the lanes. The integration will rely on butt-end-coupling steps, which will be automated via the development of module specific alignment and attachment processes on commercial equipment. The optical subassembly will be mounted on the mainboard of the module together with linear driver and TIA arrays. The assembly process will be based on the standard methodologies of MLNX and the use of polymer FlexLines for the interconnection of the optical subassembly with the drivers and the TIAs. Using these methods, TERIPHIC will develop pluggable modules with 8 lanes (800G capacity) and mid-board modules with 16 lanes (1.6T capacity) having a reach of at least 2 km. Compared to the 400G standards, the modules will reduce by 50% the power consumption per Gb/s, and will have a cost of 0.3 Euro/Gb/s. After assembly, the modules will be mounted on the line cards of MLNX switches, and will be tested in real settings. A study for the consolidation of the methods and the set up of a pilot assembly line in the post-project era will be also made.

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The information about "TERIPHIC" are provided by the European Opendata Portal: CORDIS opendata.

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