III-V NWS ON SI

Self-assembled growth of III–V Semiconductor Nanowires on Si for Future Photonic and High Electron Mobility Applications

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 Obiettivo del progetto (Objective)

'Apart from the never–ending miniaturization of higher–performance semiconductor devices, two major routes will be required to significantly push the Si semiconductor technology of today beyond its limits: the integration of low–cost Si technology with other high–performance materials and the use of new nanoscale device structures, where photonic and electronic units can exploit new functionalities via quantum physical effects. This project will merge these two important routes, aiming at the integration of III–V compound semiconductor nanostructures on Si for next–generation device applications. We will employ the gallium–arsenide (GaAs) compounds as highly efficient III–V materials due to their ultra–high carrier mobilities, superior optoelectronic properties and band gap engineering potentials. For nanoscale model systems we will incorporate these materials in the form of one–dimensional nanowires (NWs), which benefit from dimensions smaller than the emission wavelength, but also from their nearly defect–free singlecrystalline quality achieved via self–assembled growth. We will employ sophisticated molecular beam epitaxy (MBE) growth techniques to synthesize high–quality arsenide–based NWs on Si (111) via catalyst–free nucleation. The growth kinetics effects and selective area epitaxy will be directly correlated with extended materials characterization for optimization of structural, optical and electronic performance. Basic NW structures will then be extended toward advanced core–shell NW heterostructures for two complementary topics, (i) near–IR nanophotonic emitters with tunable–bandgap emission, and (ii) ultra–high electron mobility NW device structures, in particular field effect transistors (FETs). With detailed physical investigations and proof–of–principle demonstrations of such state–of–the–art device structures, we will provide significant insights toward the integration of nanoscale III–V heterostructures with Si.'

Introduzione (Teaser)

EU-funded scientists have found a new way to make solid-state devices smaller and more efficient. The technique uses self-assembled defect-free nanowire structures made of gallium arsenide (GaAs) that are grown on a silicon (Si) substrate.