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Self-Aware CPSoCs with Hierarchical Goal Management

Total Cost €


EC-Contrib. €






Project "SAGE-CPSoC" data sheet

The following table provides information about the project.


Organization address
address: KARLSPLATZ 13
city: WIEN
postcode: 1040

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Austria [AT]
 Project website
 Total cost 261˙208 €
 EC max contribution 261˙208 € (100%)
 Programme 1. H2020-EU.1.3.2. (Nurturing excellence by means of cross-border and cross-sector mobility)
 Code Call H2020-MSCA-IF-2015
 Funding Scheme MSCA-IF-GF
 Starting year 2016
 Duration (year-month-day) from 2016-09-01   to  2019-08-31


Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    TECHNISCHE UNIVERSITAET WIEN AT (WIEN) coordinator 261˙208.00


 Project objective

SoCs (System-on-Chip) constitute the basis of embedded systems, are highly complex and require thorough orchestration of different goals across operating system, compiler and architecture layers. State-of-the-art approaches tend to focus on a single aspect, while other critical objectives are neglected. There is no centralized arbiter that considers the priority and significance of objectives and requirements of each application, as the objectives of different applications may be overlapping or contradicting.

The main research objective of this project is to propose a self-aware SoC platform with hierarchical goal management (HGM). To the best of the fellow's knowledge, this project is the first systematic approach to manage SoCs considering an arbitrary number of objectives in a complex hierarchy of competing goals and sub-goals. To this end, Cyber-Physical System-on-Chip (CPSoC), a sensor- and actuator-rich multiprocessor SoC platform developed at UC Irvine (UCI), will be used in cooperation with the UCI and TU Wien (TUW) groups. The stepping stones towards this approach will be explored in the disciplines of control theory and cognitive science by utilizing supervisory control, self-awareness, and machine learning methods.

The fellow will spend two years at UCI to gain a solid understanding of hierarchical control systems and develop the basic concepts of HGM on the CPSoC platform in cooperation with TUW. Then, he will spend the third year at TUW to further develop the concepts, reinforce the system with self-awareness and online learning, and apply them in application scenarios. At TUW, he will gain a solid understanding and undertake high-level training in cognitive science while exploiting it to enhance the management strategy. This enables him to emerge from the project with new skills, and the capability to develop his career by establishing a unique position in the academia, as a competent researcher in the field of embedded and cyber-physical systems.


year authors and title journal last update
List of publications.
2019 Biswadip Maity; Majid Shoushtari; Amir M. Rahmani
Self-adaptive Memory Approximation: A Formal Control Theory Approach
published pages: , ISSN: 1943-0663, DOI: 10.5281/zenodo.3519444
IEEE Embedded Systems Letters 3 2020-01-29
2019 Arman Anzanpour, Humayun Rashid, Amir M. Rahmani, Axel Jantsch, Nikil Dutt, Pasi Liljeberg
Energy-efficient and Reliable Wearable Internet-of-Things through Fog-Assisted Dynamic Goal Management
published pages: 493-500, ISSN: 1877-0509, DOI: 10.1016/j.procs.2019.04.067
Procedia Computer Science 151 2020-01-29
2017 Axel Jantsch, Nikil Dutt, Amir Rahmani
Self-Awareness in Systems on Chip - A Survey
published pages: , ISSN: 2168-2364, DOI: 10.5281/zenodo.1488205
IEEE Design & Test 2020-01-29
2018 Anil Kanduri, Mohammad-Hashem Haghbayan, Amir M. Rahmani, Muhammad Shafique, Pasi Liljeberg, Axel Jantsch
adBoost: Thermal Aware Performance Boosting through Dark Silicon Patterning
published pages: , ISSN: 1557-9956, DOI: 10.5281/zenodo.1488350
IEEE Transactions on Computers 2020-01-29
2017 Amir Rahmani, Axel Jantsch, Nikil Dutt
HDGM: Hierarchical Dynamic Goal Management for Many-Core Resource Allocation
published pages: , ISSN: 1943-0671, DOI: 10.5281/zenodo.1486400
IEEE Embedded System Letters 2020-01-29
2017 Anil Kanduri, Mohammad-Hashem Haghbayan, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen, Nikil Dutt
Accuracy Aware Power Management for Many-core Systems running Error Resilient Applications
published pages: , ISSN: 1557-9999, DOI: 10.5281/zenodo.1488336
IEEE Transactions on Very Large Scale Integration Systems 2020-01-29
2018 Tiago Mück, Bryan Donyanavard, Kasra Moazzemi, Amir M. Rahmani, Axel Jantsch, Nikil Dutt
Design Methodology for Responsive and Robust MIMO Control of Heterogeneous Multicores
published pages: , ISSN: 2332-7766, DOI: 10.5281/zenodo.1488342
IEEE Transactions on Multi-Scale Computing Systems 2020-01-29
2017 Anil Kanduri, Mohammad-Hashem Haghbayan, Amir M. Rahmani, Pasi Liljeberg, Axel Jantsch, Hannu Tenhunen, Nikil Dutt
Accuracy-Aware Power Management for Many-Core Systems Running Error-Resilient Applications
published pages: 2749-2762, ISSN: 1063-8210, DOI: 10.1109/TVLSI.2017.2694388
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25/10 2020-01-29
2017 Amir M. Rahmani, Axel Jantsch, Nikil Dutt
HDGM: Hierarchical Dynamic Goal Management for Many-Core Resource Allocation
published pages: 1-1, ISSN: 1943-0663, DOI: 10.1109/LES.2017.2751522
IEEE Embedded Systems Letters 2020-01-29
2017 Axel Jantsch, Nikil Dutt, Amir M. Rahmani
Self-Awareness in Systems on Chip— A Survey
published pages: 8-26, ISSN: 2168-2356, DOI: 10.1109/MDAT.2017.2757143
IEEE Design & Test 34/6 2020-01-29

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