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TWILIGHT SIGNED

Towards the neW era of 1.6 Tb/s System-In-Package transceivers for datacenter appLIcations exploiting wafer-scale co-inteGration of InP membranes and InP-HBT elecTronics

Total Cost €

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EC-Contrib. €

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Partnership

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 TWILIGHT project word cloud

Explore the words cloud of the TWILIGHT project. It provides you a very rough idea of what is the project "TWILIGHT" about.

functionalities    consumption    72    modules    savings    smaller    lt    tias    gratings    analog    keep    de    unleash    transceiver    iot    polarization    latency    industrial    distances    exhibiting    servers    and16x16    demonstrators    110ghz    pi    lane    linear    layerstack    airflow    cloud    twilight    electronics    bandwidth    membranes    800gbe    accuracy    serdes    interconnectivity    112gbaud    dictated    optics    assembly    6t    area    mlnx    datacentre    power    2025    10km    2013    50    5g    technologies    standards    packaged    massive    wafer    inp    combination    112g    optical    leverage    speeds    dci    insensitive    sag    hbt    respectively    cooling    speed    optoelectronic    4x4    co    band    100ghz    huge    transceivers    20um    echelle    traffic    start    engines    created    capacity    interleaving    multiplexers    drivers    footprint    paving    asics    chip    pace    ultra    space    gt    ratification    cope    nanosecond    gb    interfacing    soas    exploited    market    fuelling    operators    40km    89    performance    bonding    close    400gbe    components    sip    realization    packaging    74    platform    switches    100gb    unprecedently    utc    selective    generation    pluggables    photodiodes    emls   

Project "TWILIGHT" data sheet

The following table provides information about the project.

Coordinator
INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS 

Organization address
address: Patission Str. 42
city: ATHINA
postcode: 10682
website: www.iccs.gr

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Greece [EL]
 Total cost 5˙080˙621 €
 EC max contribution 5˙080˙621 € (100%)
 Programme 1. H2020-EU.2.1.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT))
 Code Call H2020-ICT-2019-2
 Funding Scheme RIA
 Starting year 2019
 Duration (year-month-day) from 2019-12-01   to  2023-11-30

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    INSTITUTE OF COMMUNICATION AND COMPUTER SYSTEMS EL (ATHINA) coordinator 798˙750.00
2    TECHNISCHE UNIVERSITEIT EINDHOVEN NL (EINDHOVEN) participant 1˙505˙065.00
3    III-V LAB FR (PALAISEAU CEDEX) participant 990˙532.00
4    MELLANOX TECHNOLOGIES LTD - MLNX IL (YOKNEAM) participant 649˙400.00
5    ARGOTECH AS CZ (NACHOD) participant 616˙500.00
6    KUNGLIGA TEKNISKA HOEGSKOLAN SE (STOCKHOLM) participant 520˙373.00

Map

Leaflet | Map data © OpenStreetMap contributors, CC-BY-SA, Imagery © Mapbox

 Project objective

IoT, 5G and cloud applications have created a huge growth of datacentre traffic fuelling the market of 400GbE and the ratification of 800GbE and 1.6T standards expected within 2013-2025. Datacentre operators must keep pace with the increasing speeds and to cope with the increasing power consumption required for airflow management and cooling. Moreover, they must address the massive interconnectivity between servers and switches dictated by 5G ultra-low latency applications. 100Gb/s per lane is the next step for the realization of 800GbE modules but this will be the end of pluggables and the start of co-packaged optics with ASICs paving the way to 1.6T and beyond. TWILIGHT aims to bring InP membranes and InP-HBT electronics at unprecedently close distances (<20um) to unleash the speed capabilities of its high performance components and to enable 112Gbaud per lane. Wafer-scale bonding together with high-accuracy assembly and co-packaging concepts, TWILIGHT’s optoelectronic engines will be capable of up to 1.6T capacity. Selective area growth will be exploited to develop C-band and O-band EMLs and UTC photodiodes in combination with echelle gratings on the same system-on-chip platform. Adaptation of the SAG layerstack will be used to develop polarization insensitive SOAs enabling complex functionalities on chip. TWILIGHT will leverage analog bandwidth interleaving for interfacing its transceivers with next generation 112G SERDES and will develop analog (de)multiplexers, >110GHz linear drivers and 100GHz TIAs. TWILIGHT will exploit the PI-SOAs to develop 4x4 and16x16 optical space switches exhibiting nanosecond latency and >50% smaller footprint. The O-band and C-band SiP transceiver demonstrators leverage up to 72% and 74% power consumption savings compared to established technologies and target the datacentre market (2-10km) and DCI (<40km), respectively, with estimated cost 0.89€/Gb/s. Exploitation of TWILIGHT’s technologies is aimed via its industrial partner MLNX.

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The information about "TWILIGHT" are provided by the European Opendata Portal: CORDIS opendata.

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