DARE

"Cross-Layer Design of Adaptive, Reliable and Energy Efficient Systems"

 Coordinatore QUEEN'S UNIVERSITY BELFAST 

 Organization address address: University Road
city: BELFAST
postcode: BT7 1NN

contact info
Titolo: Ms.
Nome: Aveen
Cognome: Lavery
Email: send email
Telefono: 442891000000

 Nazionalità Coordinatore United Kingdom [UK]
 Totale costo 100˙000 €
 EC contributo 100˙000 €
 Programma FP7-PEOPLE
Specific programme "People" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013)
 Code Call FP7-PEOPLE-2011-CIG
 Funding Scheme MC-CIG
 Anno di inizio 2012
 Periodo (anno-mese-giorno) 2012-04-01   -   2016-03-31

 Partecipanti

# participant  country  role  EC contrib. [€] 
1    QUEEN'S UNIVERSITY BELFAST

 Organization address address: University Road
city: BELFAST
postcode: BT7 1NN

contact info
Titolo: Ms.
Nome: Aveen
Cognome: Lavery
Email: send email
Telefono: 442891000000

UK (BELFAST) coordinator 31˙250.00
2    ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE

 Organization address address: BATIMENT CE 3316 STATION 1
city: LAUSANNE
postcode: 1015

contact info
Titolo: Prof.
Nome: Andreas
Cognome: Burg
Email: send email
Telefono: 41216936924

CH (LAUSANNE) participant 68˙750.00

Mappa


 Word cloud

Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.

energy    quality    power    consumption    computations    designs    dsp    operation    output   

 Obiettivo del progetto (Objective)

'Though current day designs carry the promise of meeting the ever escalating demands of high performance/ quality requirements, they often exhibit large power consumption that limits the battery lifetime and generates excessive heat. Besides power consumption, process variations also pose major design concern with scaling of devices that may lead to erroneous computations and loss of stored data threatening the correct operation of future systems. Addressing both issues of low-power and reliable operation simultaneously is one of the most challenging design problems that semiconductor industry is facing today since they are contradictory in nature. The proposed project plans to address both issues by identifying and utilizing algorithmic level characteristics that can allow the design of systems that provide the right trade-offs between output quality, energy consumption and parametric yield under technology imperfections. The feasibility of the proposed cross-layer design methodology is demonstrated by our observation that for DSP systems, all computations are not equally important in shaping the output response. For such systems, some computations are more critical for determining the output quality, while others play a less important role. This information is exploited in this proposal to develop suitable designs for logic and memory elements of wireless systems that are the core of all today’s portable devices. Main target of the proposed project is to reduce the high cost of existing variation-aware techniques and overcome the incompatibility of most of them with DSP systems. Furthermore, in order to improve the energy efficiency of systems the proposal will take into account system level interactions trying to limit the energy wasted in various blocks that may operate unnecessarily in high power/quality modes in case of non-ideal operating conditions. The project is expected to strengthen EU research in one of the most challenging research topics.'

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