TAMPRES

TAMper Resistant Sensor node

 Coordinatore IHP GMBH - INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/LEIBNIZ-INSTITUT FUER INNOVATIVE MIKROELEKTRONIK 

 Organization address address: IM TECHNOLOGIEPARK 25
city: FRANKFURT (ODER)
postcode: 15236

contact info
Nome: Uwe
Cognome: George
Email: send email
Telefono: +49 335 5625 332
Fax: +49 335 5625 333

 Nazionalità Coordinatore Germany [DE]
 Totale costo 4˙323˙132 €
 EC contributo 2˙959˙465 €
 Programma FP7-ICT
Specific Programme "Cooperation": Information and communication technologies
 Code Call FP7-ICT-2009-5
 Funding Scheme CP
 Anno di inizio 2010
 Periodo (anno-mese-giorno) 2010-10-01   -   2013-12-31

 Partecipanti

# participant  country  role  EC contrib. [€] 
1    IHP GMBH - INNOVATIONS FOR HIGH PERFORMANCE MICROELECTRONICS/LEIBNIZ-INSTITUT FUER INNOVATIVE MIKROELEKTRONIK

 Organization address address: IM TECHNOLOGIEPARK 25
city: FRANKFURT (ODER)
postcode: 15236

contact info
Nome: Uwe
Cognome: George
Email: send email
Telefono: +49 335 5625 332
Fax: +49 335 5625 333

DE (FRANKFURT (ODER)) coordinator 0.00
2 Coalesenses GmbH DE participant 0.00
3    EURECOM

 Organization address address: ROUTE DES CHAPPES 450 CAMPUS SOPHIATECH
city: BIOT
postcode: 6410

contact info
Titolo: Ms.
Nome: Claire
Cognome: Cristofaro
Email: send email
Telefono: +33 493008258
Fax: +33 493008200

FR (BIOT) participant 0.00
4    NXP SEMICONDUCTORS BELGIUM NV

 Organization address address: INTERLEUVENLAAN 80
city: LEUVEN
postcode: 3001

contact info
Titolo: Mr.
Nome: Patrick
Cognome: Pype
Email: send email
Telefono: +32 16 394 536
Fax: +32 16 390 855

BE (LEUVEN) participant 0.00
5    NXP SEMICONDUCTORS GERMANY GMBH

 Organization address address: Stresemannallee
city: Hamburg
postcode: 22529

contact info
Titolo: Mr.
Nome: Georg
Cognome: Menges
Email: send email
Telefono: +49 40 5613 3929
Fax: +49 40 5613 3313

DE (Hamburg) participant 0.00
6    ORANGE SA

 Organization address address: RUE OLIVIER DE SERRES
city: PARIS
postcode: 75015

contact info
Titolo: Ms.
Nome: Florence
Cognome: Viaud
Email: send email
Telefono: +33 1 45 29 59 04
Fax: +33 1 40 95 70 15

FR (PARIS) participant 0.00
7    TECHNISCHE UNIVERSITAET GRAZ

 Organization address address: RECHBAUERSTRASSE
city: GRAZ
postcode: 8010

contact info
Titolo: Ms.
Nome: Melanie
Cognome: Blauensteiner
Email: send email
Telefono: +43 316 873 5514
Fax: +43 316 873 5520

AT (GRAZ) participant 0.00
8    UNIVERSITE CATHOLIQUE DE LOUVAIN

 Organization address address: Place De L'Universite
city: LOUVAIN-LA-NEUVE
postcode: 1348

contact info
Titolo: Ms.
Nome: Sylvie
Cognome: Baudine
Email: send email
Telefono: 3210478137
Fax: 3210472598

BE (LOUVAIN-LA-NEUVE) participant 0.00

Mappa


 Word cloud

Esplora la "nuvola delle parole (Word Cloud) per avere un'idea di massima del progetto.

cryptographic    sensor    iot    cores       security    physical    components    mechanisms    attacks    nodes    secure    trustworthiness    network    wsn    protection   

 Obiettivo del progetto (Objective)

As the Internet of Things (IoT) becomes a reality the trustworthiness of all its components assumes the utmost importance. The trustworthiness of any system in the definition of call 5 i.e. security, reliability etc. depends on its weakest part. When wireless sensor nodes (WSN) are included in the IoT it is likely that one of the more vulnerable parts will be the sensor nodes themselves. These devices can be attacked by 'standard' network based approaches but also by physical means if they are left unattended in remote sites which is the preferred application for WSN. While much research effort has been spent on improving the network security of WSN, the protection of the nodes and especially their protection against physical attacks has been, until now, neglected. We are convinced that protecting the WSN is essential since compromised nodes put the whole system at risk.nTAMPRES aims to significantly improve the trustworthiness of WSN. To achieve this goal we will investigate protection mechanisms in the following areas:n•tPrevention of side-channel and fault-injection attacks: evaluation and development of appropriate counter measures while also considering the severe constraints of energy and silicon area.n•tProvision of flawless implementation of lightweight cryptographic cores: development of secure and properly implemented light-weight cryptographic cores to provide uncompromised cryptographic strength to higher layers.n•tAttack resistant system architecture: secure integration and partitioning of the whole system including hardware components and secure low level services.nThe range of protection mechanisms available will be evaluated by experiments with existing and recently manufactured ASICs. To ensure manufacturer independence, both the NXP and the IHP technology will be used to evaluate the results. TAMPRES will also integrate its findings in a methodology which supports system designers to select the correct means to protect their new devices.

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