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MANGO

MANGO: exploring Manycore Architectures for Next-GeneratiOn HPC systems

Total Cost €

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EC-Contrib. €

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Partnership

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 MANGO project word cloud

Explore the words cloud of the MANGO project. It provides you a very rough idea of what is the project "MANGO" about.

passive    sensitive    generation    interplay    memory    run    interconnect    explore    blocks    15mwatt    pro    service    chip    link    extreme    etp4hpc    hn    heterogeneous    full    exploration    building    qos    programming    realization    ultimately    computing    sw    optimization    efficiency    noticeable    hitherto    cooling    capacity    inherently    predictability    involve    validated    infrastructure    pflops    intertwined    active    resource    layers    architectures    purpose    rack    innovative    ppp    mechanisms    positioning    boundary    lt    inexistent    dynamic    nodes    hpc    enabler    homogeneous    isolation    scenarios    energy    disruptive    quality    interconnects    board    models    sustainable    performance    consumption    architecture    linked    mango    monitoring    hw    levels    power    toolset    thermal    architectural    cross    emulation    acceleration    space    combined    bandwidth    definition    realistic    interrelated    guarantees    examples    solutions    strategic    latency    node    agenda    customization    cores    delivered    gn    platform    efficient    native    time    compute    holistic   

Project "MANGO" data sheet

The following table provides information about the project.

Coordinator
UNIVERSITAT POLITECNICA DE VALENCIA 

Organization address
address: CAMINO DE VERA SN EDIFICIO 3A
city: VALENCIA
postcode: 46022
website: www.upv.es

contact info
title: n.a.
name: n.a.
surname: n.a.
function: n.a.
email: n.a.
telephone: n.a.
fax: n.a.

 Coordinator Country Spain [ES]
 Project website http://www.mango-project.eu
 Total cost 5˙801˙820 €
 EC max contribution 5˙801˙820 € (100%)
 Programme 1. H2020-EU.1.2.2. (FET Proactive)
 Code Call H2020-FETHPC-2014
 Funding Scheme RIA
 Starting year 2015
 Duration (year-month-day) from 2015-10-01   to  2019-03-31

 Partnership

Take a look of project's partnership.

# participants  country  role  EC contrib. [€] 
1    UNIVERSITAT POLITECNICA DE VALENCIA ES (VALENCIA) coordinator 418˙875.00
2    PRO DESIGN Electronic GmbH DE (Bruckmuehl) participant 1˙860˙963.00
3    POLITECNICO DI MILANO IT (MILANO) participant 646˙875.00
4    Centro Regionale Information Communication Technology scrl IT (Benevento) participant 571˙250.00
5    ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE CH (LAUSANNE) participant 522˙083.00
6    PHILIPS MEDICAL SYSTEMS NEDERLAND BV NL (BEST) participant 495˙940.00
7    THALES SIX GTS FRANCE SAS FR (GENNEVILLIERS) participant 452˙207.00
8    SVEUCILISTE U ZAGREBU FAKULTET ELEKTROTEHNIKE I RACUNARSTVA HR (ZAGREB) participant 436˙000.00
9    EATON INDUSTRIES (FRANCE) SAS FR (MONTBONNOT SAINT MARTIN) participant 397˙625.00

Map

 Project objective

MANGO targets to achieve extreme resource efficiency in future QoS-sensitive HPC through ambitious cross-boundary architecture exploration for performance/power/predictability (PPP) based on the definition of new-generation high-performance, power-efficient, heterogeneous architectures with native mechanisms for isolation and quality-of-service, and an innovative two-phase passive cooling system. Its disruptive approach will involve many interrelated mechanisms at various architectural levels, including heterogeneous computing cores, memory architectures, interconnects, run-time resource management, power monitoring and cooling, to the programming models. The system architecture will be inherently heterogeneous as an enabler for efficiency and application-based customization, where general-purpose compute nodes (GN) are intertwined with heterogeneous acceleration nodes (HN), linked by an across-boundary homogeneous interconnect. It will provide guarantees for predictability, bandwidth and latency for the whole HN node infrastructure, allowing dynamic adaptation to applications. MANGO will develop a toolset for PPP and explore holistic pro-active thermal and power management for energy optimization including chip, board and rack cooling levels, creating a hitherto inexistent link between HW and SW effects at all layers. Project will build an effective large-scale emulation platform. The architecture will be validated through noticeable examples of application with QoS and high-performance requirements.

Ultimately, the combined interplay of the multi-level innovative solutions brought by MANGO will result in a new positioning in the PPP space, ensuring sustainable performance as high as 100 PFLOPS for the realistic levels of power consumption (<15MWatt) delivered to QoS-sensitive applications in large-scale capacity computing scenarios providing essential building blocks at the architectural level enabling the full realization of the ETP4HPC strategic research agenda

 Deliverables

List of deliverables.
Report on MANGO Software Support Documents, reports 2019-11-19 08:52:34
Project Dissemination and Communication plan Documents, reports 2019-11-19 08:52:33
Phase 1 Platform Demonstrators, pilots, prototypes 2019-11-19 08:52:33
Board and Rack Architectures Documents, reports 2019-11-19 08:52:34
Periodic dissemination report - 1 Documents, reports 2019-11-19 08:52:34
Report on WP2 progress Documents, reports 2019-11-19 08:52:34
Report on the MANGO Architecture Specifications Documents, reports 2019-11-19 08:52:34
Progress Management Report - 1 Documents, reports 2019-11-19 08:52:34
Report on Application Requirements Documents, reports 2019-11-19 08:52:34
Reporting of WP5 progress Documents, reports 2019-11-19 08:52:34
Project Website Documents, reports 2019-11-19 08:52:33
Transcoding Applications Documents, reports 2019-11-19 08:52:35
Progress Management Report - 2 Documents, reports 2019-11-19 08:52:35
Final Project Validation Demonstrators, pilots, prototypes 2019-11-19 08:52:35
Programming Models and Compilers Documents, reports 2019-11-19 08:52:35
Tile Architectures Documents, reports 2019-11-19 08:52:35
OS, Hypervisor Adaptation, and HPC Monitoring Documents, reports 2019-11-19 08:52:35
Final high-level workshop Documents, reports 2019-11-19 08:52:35
Periodic dissemination report - 2 Documents, reports 2019-11-19 08:52:35
Manycore Architectures Documents, reports 2019-11-19 08:52:35
Final Implemented Real-Time HPC Software Support Documents, reports 2019-11-19 08:52:35
Final (phase 3) Platform Demonstrators, pilots, prototypes 2019-11-19 08:52:34
Runtime Management Support Documents, reports 2019-11-19 08:52:35
Phase 2 Platform Demonstrators, pilots, prototypes 2019-11-19 08:52:34

Take a look to the deliverables list in detail:  detailed list of MANGO deliverables.

 Publications

year authors and title journal last update
List of publications.
2016 Alessandro Cilardo, Mirko Gagliardi, Ciro Donnarumma
\"\"\"A Configurable Shared Scratchpad Memory for GPU-like Processors\"\"\"
published pages: 3-14, ISSN: , DOI: 10.1007/978-3-319-49109-7_1
Advances on P2P, Parallel, Grid, Cloud and Internet Computing, Volume 1 of the series Lecture Notes on Data Engineering and Communications Technologies 2019-11-19
2018 Arman Iranfar, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram, David Atienza
TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip
published pages: 1532-1545, ISSN: 0278-0070, DOI: 10.1109/tcad.2017.2768417
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37/8 2019-11-19
2016 Karim Kanoun, Cem Tekin, David Atienza, Mihaela van der Schaar
Big-Data Streaming Applications Scheduling Based on Staged Multi-armed Bandits
published pages: 1-1, ISSN: 0018-9340, DOI: 10.1109/TC.2016.2550454
IEEE Transactions on Computers 2019-11-19
2016 Innocenzo Mungiello, Francesco De Rosa
\"\"\"Adaptive Modular Mapping to Reduce Shared Memory Bank Conflicts on GPUs\"\"\"
published pages: 361-372, ISSN: , DOI: 10.1007/978-3-319-49109-7_34
Advances on P2P, Parallel, Grid, Cloud and Internet Computing, Volume 1 of the series Lecture Notes on Data Engineering and Communications Technologies 2019-11-19
2018 José Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Etienne Cappe, Alessandro Cilardo, Leon Dragić, Alexandre Dray, Alen Duspara, William Fornaciari, Edoardo Fusella, Mirko Gagliardi, Gerald Guillaume, Daniel Hofman, Ynse Hoornenborg, Arman Iranfar, Mario Kovač, Simone Libutti, Bruno Maitre, José Maria Martínez, Giuseppe Massari, Koen Meinds, Hrvoje Mlinarić, Ermis Papastefanakis, Tomás Picornell, Igor Piljić, Anna Pupykina, Federico Reghenzani, Isabelle Staub, Rafael Tornero, Michele Zanella, Marina Zapater, Davide Zoni
Exploring manycore architectures for next-generation HPC systems through the MANGO approach
published pages: 154-170, ISSN: 0141-9331, DOI: 10.1016/j.micpro.2018.05.011
Microprocessors and Microsystems 61 2019-11-19
2018 Arman Iranfar, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram, David Atienza
TheSPoT: Thermal Stress-Aware Power and Temperature Management for Multiprocessor Systems-on-Chip
published pages: 1532-1545, ISSN: 0278-0070, DOI: 10.1109/tcad.2017.2768417
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37/8 2019-11-19
2018 Edoardo Fusella, Alessandro Cilardo
Reducing Power Consumption of Lasers in Photonic NoCs through Application-Specific Mapping
published pages: 1-11, ISSN: 1550-4832, DOI: 10.1145/3173463
ACM Journal on Emerging Technologies in Computing Systems 14/2 2019-11-19
2018 Arman Iranfar, Marina Zapater, David Atienza
Machine Learning-Based Quality-Aware Power and Thermal Management of Multistream HEVC Encoding on Multicore Servers
published pages: 2268-2281, ISSN: 1045-9219, DOI: 10.1109/tpds.2018.2827381
IEEE Transactions on Parallel and Distributed Systems 29/10 2019-11-19
2018 Ali Pahlevan, Xiaoyu Qu, Marina Zapater, David Atienza
Integrating Heuristic and Machine-Learning Methods for Efficient Virtual Machine Allocation in Data Centers
published pages: 1667-1680, ISSN: 0278-0070, DOI: 10.1109/tcad.2017.2760517
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 37/8 2019-11-19
2018 Davide Zoni, Luca Cremona, Alessandro Cilardo, Mirko Gagliardi, William Fornaciari
PowerTap: All-digital power meter modeling for run-time power monitoring
published pages: 128-139, ISSN: 0141-9331, DOI: 10.1016/j.micpro.2018.07.007
Microprocessors and Microsystems 63 2019-11-19
2019 A.Cilardo, M. Gagliardi, V. Scotti
Lightweight hardware support for selective coherence in heterogeneous manycore accelerators
published pages: , ISSN: , DOI:
2019-11-19
2019 2. L. Costero, A. Iranfar, M. Zapater, F. Igual, K. Olcoz, D. Atienza
Multi-Agent Reinforcement Learning for Efficient Real-Time Multi-User Video Transcoding
published pages: , ISSN: , DOI:
2019-11-19
2019 1. Iranfar, A. Pahlevan, M. Zapater, D. Atienza
Enhancing Two-Phase Cooling Efficiency through Thermal-Aware Workload Mapping for Power-Hungry Servers
published pages: , ISSN: , DOI:
2019-11-19

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