HERCULES
High-Performance Real-time Architectures for Low-Power Embedded Systems
Total Cost €
0EC-Contrib. €
0Partnership
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0HERCULES project word cloud
Explore the words cloud of the HERCULES project. It provides you a very rough idea of what is the project "HERCULES" about.
Project "HERCULES" data sheet
The following table provides information about the project.
| Coordinator |
UNIVERSITA DEGLI STUDI DI MODENA E REGGIO EMILIA
Organization address contact info |
| Coordinator Country | Italy [IT] |
| Project website | http://hercules2020.eu/ |
| Total cost | 3˙261˙443 € |
| EC max contribution | 2˙072˙300 € (64%) |
| Programme |
1. H2020-EU.2.1.1. (INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)) |
| Code Call | H2020-ICT-2015 |
| Funding Scheme | IA |
| Starting year | 2016 |
| Duration (year-month-day) | from 2016-01-01 to 2018-12-31 |
Partnership
Take a look of project's partnership.
| # | ||||
|---|---|---|---|---|
| 1 | UNIVERSITA DEGLI STUDI DI MODENA E REGGIO EMILIA | IT (MODENA) | coordinator | 606˙215.00 |
| 2 | EVIDENCE SRL | IT (PISA) | participant | 367˙500.00 |
| 3 | CESKE VYSOKE UCENI TECHNICKE V PRAZE | CZ (PRAHA) | participant | 344˙875.00 |
| 4 | MARELLI EUROPE SPA | IT (CORBETTA) | participant | 329˙656.00 |
| 5 | AIRBUS DEFENCE AND SPACE GMBH | DE (TAUFKIRCHEN) | participant | 242˙943.00 |
| 6 | PITOM S.N.C. DI MICHELE FRANCHI E ROBERTO MATI | IT (PISA) | participant | 181˙109.00 |
| 7 | EIDGENOESSISCHE TECHNISCHE HOCHSCHULE ZUERICH | CH (ZUERICH) | participant | 0.00 |
Map
Project objective
The advent of commercial-of-the-shelf (COTS) heterogeneous multi-core platforms is opening up a series of opportunities in the embedded computing market. Integrating multiple computing element running at smaller frequencies allows obtaining impressive performance capabilities at a reduced power consumption. At the same time, new applications are being proposed integrating more and more functionalities in the objects commonly used for our daily activities, imposing a number of additional requirements to embedded systems designers: - higher computing workloads, elaborating and fusing multiple sensor data; - reduced power consumption, allowing smaller batteries and renewable power sources; - quicker interaction with the environment, requiring a prompt elaboration of sensor data; - higher criticality, replacing safety-critical human activities.
These converging needs call for “real-time embedded super-computing platforms” that are able to predictably provide real-time guarantees to applications running on top of next generation embedded platforms. These applications do not only require high performance at low power. They also need to provide predictable guarantees. Having impressive average performances with no guaranteed bounds on the response times of the critical computing activities is of little if no use to these applications. Project HERCULES will provide the required technological infrastructure to obtain an order-of-magnitude improvement in the cost and power consumption of next generation real-time applications. It will develop an integrated framework to allow achieving predictable performance on top of cutting-edge heterogeneous CTOS multi-core platforms, implementing real-time scheduling techniques and execution models recently proposed in the research community. The framework will be applied to two innovative industrial use cases: a pioneering autonomous driving system for the automotive domain, and a visual recognition system for the avionic domain.
Deliverables
| Final Periodic report | Documents, reports | 2020-01-28 10:20:47 |
| Project management plan | Documents, reports | 2020-01-28 10:20:46 |
| Specification of Hardware Platforms | Documents, reports | 2020-01-28 10:20:46 |
| Application Requirements | Documents, reports | 2020-01-28 10:20:46 |
| Detailed Characterization of Platforms | Documents, reports | 2020-01-28 10:20:46 |
| Programming Model(s) analysis and selection | Documents, reports | 2020-01-28 10:20:46 |
| Open source strategy plan | Documents, reports | 2020-01-28 10:20:46 |
| Year 1 Periodic report | Documents, reports | 2020-01-28 10:20:46 |
| Collaboration and Communication Tools | Websites, patent fillings, videos etc. | 2020-01-28 10:20:46 |
| Final Board | Demonstrators, pilots, prototypes | 2020-01-28 10:20:46 |
| Power-Aware Scheduling Algorithm for Host | Documents, reports | 2020-01-28 10:20:45 |
| Integrated Schedulability Analysis | Documents, reports | 2020-01-28 10:20:45 |
| Optimized support for predictability in the accelerator programing environment | Demonstrators, pilots, prototypes | 2020-01-28 10:20:45 |
| Final dissemination report | Documents, reports | 2020-01-28 10:20:46 |
| Multi-OS integration and Virtualization | Demonstrators, pilots, prototypes | 2020-01-28 10:20:45 |
| Optimized runtime for parallel heterogeneous platforms | Demonstrators, pilots, prototypes | 2020-01-28 10:20:45 |
| Open source results | Documents, reports | 2020-01-28 10:20:46 |
| Scheduling Algorithm for Parallel Accelerators | Documents, reports | 2020-01-28 10:20:45 |
| Lightweight RTOS - final | Demonstrators, pilots, prototypes | 2020-01-28 10:20:46 |
| Validation Report | Documents, reports | 2020-01-28 10:20:46 |
| Real-time Linux - final | Demonstrators, pilots, prototypes | 2020-01-28 10:20:45 |
| Final exploitation plan | Documents, reports | 2020-01-28 10:20:46 |
Take a look to the deliverables list in detail: detailed list of HERCULES deliverables.
Publications
| year | authors and title | journal | last update |
|---|---|---|---|
| 2017 |
Anna Minaeva, Benny Akesson, Zdenek Hanzalek, Dakshina Dasari Time-Triggered Co-Scheduling of Computation and Communication with Jitter Requirements published pages: 1-1, ISSN: 0018-9340, DOI: 10.1109/TC.2017.2722443 |
IEEE Transactions on Computers | 2020-01-28 |
| 2017 |
Björn Forsberg, Daniele Palossi, Andrea Marongiu, Luca Benini GPU-Accelerated Real-Time Path Planning and the Predictable Execution Model published pages: 2428-2432, ISSN: 1877-0509, DOI: 10.1016/j.procs.2017.05.219 |
Procedia Computer Science 108 | 2020-01-28 |
| 2017 |
Paolo Burgio, Marko Bertogna, Nicola Capodieci, Roberto Cavicchioli, Michal Sojka, Přemysl Houdek, Andrea Marongiu, Paolo Gai, Claudio Scordino, Bruno Morelli A software stack for next-generation automotive systems on many-core heterogeneous platforms published pages: 299-311, ISSN: 0141-9331, DOI: 10.1016/j.micpro.2017.06.016 |
Microprocessors and Microsystems 52 | 2020-01-28 |
| 2017 |
Francesco Conti, Daniele Palossi, Renzo Andri, Michele Magno, Luca Benini Accelerated Visual Context Classification on a Low-Power Smartwatch published pages: 1-12, ISSN: 2168-2291, DOI: 10.1109/THMS.2016.2623482 |
IEEE Transactions on Human-Machine Systems | 2020-01-28 |
| 2019 |
Ignacio Sañudo, Paolo Cortimiglia, Luca Miccio, Marco Solieri, Paolo Burgio, Christian Di Biagio, Franco Felici, Giovanni Nuzzo and Marko Bertogna The key role of memory in next-generation embedded systems for military application published pages: , ISSN: , DOI: |
Proceedings of International Conference in Software Engineering for Defence Applications,in Advances in Intelligent Systems and Computing | 2020-01-28 |
| 2018 |
Joel Matějka, Björn Forsberg, Michal Sojka, Přemysl Šůcha, Luca Benini, Andrea Marongiu, Zdeněk Hanzálek Combining PREM Compilation and Static Scheduling for High-Performance and Predictable MPSoC Execution published pages: , ISSN: 0167-8191, DOI: 10.1016/j.parco.2018.11.002 |
Parallel Computing | 2020-01-28 |
| 2019 |
Claudio Scordino, Luca Abeni, Juri Lelli Real-time and energy efficiency in Linux published pages: 18-30, ISSN: 1559-6915, DOI: 10.1145/3307624.3307627 |
ACM SIGAPP Applied Computing Review 18/4 | 2020-01-28 |
| 2019 |
Jan Dvorak, Zdenek Hanzalek Multi-Variant Scheduling of Critical Time-Triggered Communication in Incremental Development Process: Application to FlexRay published pages: 155-169, ISSN: 0018-9545, DOI: 10.1109/tvt.2018.2879920 |
IEEE Transactions on Vehicular Technology 68/1 | 2020-01-28 |
| 2017 |
Bjorn Forsberg, Andrea Marongiu, Luca Benini GPUguard: towards supporting a predictable execution model for heterogeneous SoC published pages: 318-321, ISSN: , DOI: 10.3929/ethz-b-000222912 |
Proceedings of the Conference on Design, Automation & Test in Europe | 2020-01-28 |
| 2017 |
Kurth, Andreas; Vogel, Pirmin; Capotondi, Alessandro; Marongiu, Andrea; Benini, Luca HERO: Heterogeneous Embedded Research Platform for Exploring RISC-V Manycore Accelerators on FPGA published pages: , ISSN: , DOI: 10.3929/ethz-b-000219249 |
Proceedings of Computer Architecture Research with RISC-V Workshop (CARRV\' 17) 11 | 2020-01-28 |
| 2019 |
Daniele Palossi, Andres Gomez, Stefan Draskovic, Andrea Marongiu, Lothar Thiele, Luca Benini Extending the Lifetime of Nano-Blimps via Dynamic Motor Control published pages: 339-361, ISSN: 1939-8018, DOI: 10.1007/s11265-018-1343-1 |
Journal of Signal Processing Systems 91/3-4 | 2020-01-28 |
| 2017 |
Pirmin Vogel, Andreas Kurth, Johannes Weinbuch, Andrea Marongiu, Luca Benini Efficient Virtual Memory Sharing via On-Accelerator Page Table Walking in Heterogeneous Embedded SoCs published pages: 1-19, ISSN: 1539-9087, DOI: 10.1145/3126560 |
ACM Transactions on Embedded Computing Systems 16/5s | 2020-01-28 |
| 2018 |
Alessandro Biondi, Giorgio Buttazzo, Marko Bertogna A design flow for supporting component-based software development in multiprocessor real-time systems published pages: 800-829, ISSN: 0922-6443, DOI: 10.1007/s11241-018-9301-3 |
Real-Time Systems 54/4 | 2020-01-28 |
| 2018 |
Pirmin Vogel, Andrea Marongiu, Luca Benini Exploring Shared Virtual Memory for FPGA Accelerators with a Configurable IOMMU published pages: 1-1, ISSN: 0018-9340, DOI: 10.1109/tc.2018.2879080 |
IEEE Transactions on Computers | 2020-01-28 |
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