SafeNet SIGNED

Project "SafeNet" data sheet

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 Project objective

Programmable hardware dataplanes such as the Barefoot Tofino enable unprecedented network flexibility, promising an ever-evolving set of network functionalities at hardware speeds, and are being rolled out in production. However, programming such dataplanes is very difficult as numerous bugs have been found even in trivial programs: accesses to uninitialized header fields, header stack underflows or overflows and processing of dropped packets. Verifying P4 programs before deployment is a great solution to make P4 programs safe. Recent research in this direction has shown that many bugs can be caught if (1) we know the concrete table entries at verification time (Vera, our work in Sigcomm 2018), or (2) if programmers express which rules are likely to appear in practice (p4v in Sigcomm 2018). Both approaches impose a high burden on the programmer, which reduces their applicability. In the CORNET ERC Stg project we have developed af4, a verification tool that finds all bugs and automatically fixes P4 programs without needing programmer input. The key insight behind our work is that verification need not consider all table entries because certain table entries will always result in faulty behavior for all matching packets and thus cannot appear in a correct deployment. af4 automatically generates predicates that filter out buggy table entries. If bugs are still reachable after predicate inference, af4 automatically adds a minimal number of keys to the existing tables and generates predicates that remove all bugs in the programs we tested. In this project we will explore the feasibility of commercial exploitation of af4: a) we will conduct a market study to understand potential customers; b) we will study possible approaches to commercialise af4 including open-source consulting, cloud-based, or closed-source, and c) take steps towards commercialisation including the development of alfa-testing tools to be given to prospective customers.