ELITE
Extended Large (3D) Integration TEchnology
| Coordinatore | COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Organization address
address: Rue des Martyrs 17 contact info |
| Nazionalità Coordinatore | France [FR] |
| Totale costo | 5˙628˙834 € |
| EC contributo | 3˙600˙000 € |
| Programma | FP7-ICT
Specific Programme "Cooperation": Information and communication technologies |
| Code Call | FP7-ICT-2007-1 |
| Funding Scheme | CP |
| Anno di inizio | 2007 |
| Periodo (anno-mese-giorno) | 2007-11-01 - 2011-08-31 |
Partecipanti
| # | ||||
|---|---|---|---|---|
| 1 |
COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Organization address
address: Rue des Martyrs 17 contact info |
FR (Grenoble) | coordinator | 0.00 |
| 2 |
HYPERSTONE GMBH
Organization address
address: LINE-EID-STRASSE 3 contact info |
DE (KONSTANZ) | participant | 0.00 |
| 3 |
KUNGLIGA TEKNISKA HOEGSKOLAN
Organization address
address: Valhallavaegen contact info |
SE (STOCKHOLM) | participant | 0.00 |
| 4 |
LANCASTER UNIVERSITY
Organization address
address: BAILRIGG contact info |
UK (LANCASTER) | participant | 0.00 |
| 5 |
MICRON SEMICONDUCTOR ITALIA SRL
Organization address
address: VIA CAMILLO OLIVETTI contact info |
IT (AGRATE BRIANZA) | participant | 0.00 |
Mappa
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Obiettivo del progetto (Objective)
For developing complex next-generation chips which include a combination of disparate technologies, the circuit integration exclusively in two dimensions has proved to be a seriously limiting factor. Utilising the third dimension for integration of complex chips is a promising technique for removing the bottlenecks in two-dimensional (2-D) integration. Advantages of third-dimension (3-D) integration are in first order form factor and power dissipation.The proposed project ELITE aims at miniaturization and density increase beyond Moore by means of exhaustive die stacking. It takes as development vehicle an advanced solid state drive which will widely substitute traditional hard disk drives for purpose of mobile and hand-held applications and which is considered as the enabler of the up-coming era of mobile data. The system architecture will include a large amount of non-volatile flash memory, one or more microcontrollers and external analog high-speed interface.One of the main topics of ELITE will be the development of a technology for vertical die stacking and for vertical interconnect. Starting from the expertise and experience of the consortium new technology modifications or alternative technologies will be investigated. Also assembly technology will be investigated considering possible later usage in mass-production with its specific requirements on manufacturability and cost.Conceptual and physical simulations will be deployed for planning and ensuring the system architecture and specifying a demonstrator which will prove the feasibility of the concept. Firmware inside the chip will be used to optimize performance by means of parallel tasks, guaranty highly reliable data access as well as controlling power dissipation.As a final step, generalization of the results which are reached with the solid-state drive vehicle will be generalized in order to be re-used for applications from different technical domains and markets.