NANOSPID2

Nanowires for single photon detection and spin memory devices

Coordinatore	TECHNISCHE UNIVERSITEIT DELFT    more  Organization address address: Stevinweg 1 city: DELFT postcode: 2628 CN contact info Titolo: Ms. Nome: Jose Cognome: Van Vugt Email: send email Telefono: +31 15 2786064 Fax: +31 15 2787413
Nazionalità Coordinatore	Netherlands [NL]
Totale costo	160˙748 €
EC contributo	160˙748 €
Programma	FP7-PEOPLE Specific programme "People" implementing the Seventh Framework Programme of the European Community for research, technological development and demonstration activities (2007 to 2013)
Code Call	FP7-PEOPLE-2009-IEF
Funding Scheme	MC-IEF
Anno di inizio	2010
Periodo (anno-mese-giorno)	2010-03-01   -   2012-02-29

 Partecipanti

#	participant	country	role	EC contrib. [€]
1	TECHNISCHE UNIVERSITEIT DELFT  Organization address address: Stevinweg 1 city: DELFT postcode: 2628 CN contact info Titolo: Ms. Nome: Jose Cognome: Van Vugt Email: send email Telefono: +31 15 2786064 Fax: +31 15 2787413	NL (DELFT)	coordinator	160˙748.80

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 Obiettivo del progetto (Objective)

'The ultimate limit in the miniaturization of electronics and photonics is at the nanometer scale. Here the signal level can be controlled at the fundamental level of a single electron and a single photon. These limits are actively being pursued for scientific interest with possible applications in the area of quantum information processing and communication. We propose novel devices aimed at single photon detection and single spin memory using nanowires. The basic building block is a III-V quantum dot defined in a Si nanowire. We will develop the following technology: (1) growth of complex semiconductor nanowire, (2) quantum state storage and transfer onto a photon state for the memory device, and (3) single photon detection and electron multiplication for single photon detection. The nanowires will be grown by the vapor-liquid-solid mechanism. The structures and devices obtained after growth and each nanofabrication steps will be thoroughly characterized and the final test devices performances will be evaluated.'